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/*
//
// servo motors controller example.
// use Ada fruit PCA9685 I2C PWM controller
//
// initialize
pushi main_a0
jmp servoInit
main_a0: jz main_a0_1
pushi 0x00
out
halt
// move to center
main_a0_1: pushi 0
push servoCen
push servoCh0
push servoAddr
pushi main_a1
jmp wi2c4 // move ch0 to center
main_a1: jz main_a1_1
pushi 0x01
out
halt
main_a1_1: pushi 0x000f
pushi main_a2
jmp waitLoop // wait
main_a2: jz main_a2_1
pushi 0x02
out
halt
main_a2_1: pushi 0
push servoMin
push servoCh0
push servoAddr
pushi main_a3
jmp wi2c4 // move ch0 to min
main_a3: jz main_a3_1
pushi 0x03
out
halt
main_a3_1: pushi 0x000f
pushi main_a4 // wait
jmp waitLoop
main_a4: jz main_a4_1
pushi 0x04
out
halt
main_a4_1: pushi 0
push servoCen
push servoCh0
push servoAddr
pushi main_a5
jmp wi2c4 // move ch0 to center
main_a5: jz main_a5_1
pushi 0x05
out
halt
main_a5_1: pushi 0x000f
pushi main_a6
jmp waitLoop // wait
main_a6: jz main_a6_1
pushi 0x06
out
halt
// move to max
main_a6_1: pushi 0
push servoMax
push servoCh0
push servoAddr
pushi main_a7
jmp wi2c4 // move ch0 to max
main_a7: jz main_a7_1
pushi 0x07
out
halt
// wait
main_a7_1: pushi 0x000f
pushi main_a8
jmp waitLoop // wait
main_a8: jz main_a8_1
pushi 0x08
out
halt
// move to center
main_a8_1: pushi 0
push servoCen
push servoCh0
push servoAddr
pushi main_a9
jmp wi2c4 // move ch0 to center
main_a9: jz main_a9_1
pushi 0x09
out
halt
main_a9_1: pushi 0x10
out
halt // halt
main_rcode: 0x0000
servoInit: push servoInit_jmp
bor
pop servoInit_rtn
pushi 0x00
push servoMode1
push servoAddr
pushi servoInit_a0
jmp wi2c1
servoInit_a0: pop servoInit_RtnCode
push servoInit_RtnCode
jz servoInit_a0_1
push servoInit_RtnCode //error
out
halt
pushi 11
jmp servoInit_rtn
servoInit_a0_1: pushi servoMode1Val
push servoMode1
push servoAddr
pushi servoInit_a1
jmp ri2c1 // read current value of the mode-1 register
servoInit_a1: pop servoInit_RtnCode
push servoInit_RtnCode
jz servoInit_a1_1
push servoInit_RtnCode // error
out
halt
pushi 1
jmp servoInit_rtn
servoInit_a1_1: push servoMode1Val
pushi 0x7f
band
pushi 0x10
bor
push servoMode1
push servoAddr
pushi servoInit_a2
jmp wi2c1 // set the sleep mode on, restart disabled 40> 00+ 10+
servoInit_a2: pop servoInit_RtnCode
push servoInit_RtnCode
jz servoInit_a2_1
push servoInit_RtnCode // error
out
halt
pushi 2
jmp servoInit_rtn
servoInit_a2_1: pushi 0x70
push servoPreScale
push servoAddr
pushi servoInit_a3
jmp wi2c1 // set the pwm frequency prescale register 40> fe+ 70+
servoInit_a3: pop servoInit_RtnCode
push servoInit_RtnCode
jz servoInit_a3_1
push servoInit_RtnCode // error
out
halt
pushi 3
jmp servoInit_rtn
servoInit_a3_1: push servoMode1Val
push servoMode1
push servoAddr
pushi servoInit_a4
jmp wi2c1 // recover the mode-1 register, .... wake up. 40> 00+ 00+
servoInit_a4: pop servoInit_RtnCode
push servoInit_RtnCode
jz servoInit_a4_1
push servoInit_RtnCode // error
out
halt
pushi 4
jmp servoInit_rtn
servoInit_a4_1: pushi 0x000f
pushi servoInit_a5
jmp waitLoop
servoInit_a5: pop servoInit_RtnCode
push servoMode1Val
pushi 0x00a1
bor
push servoMode1
push servoAddr
pushi servoInit_a6
jmp wi2c1 // set the mode-1 register to incremental mode. 40> 00+ a1+
servoInit_a6: pop servoInit_RtnCode
push servoInit_RtnCode
jz servoInit_a6_1
push servoInit_RtnCode // error
out
halt
pushi 6
jmp servoInit_rtn
servoInit_a6_1: pushi 0
servoInit_rtn: 0x0000 //return
servoInit_jmp: 0x4000
servoAddr: 0x0040
servoMode1: 0x0000
servoMode1Val: 0x0000
servoPreScale: 0x00fe
servoCh0: 0x0006
servoCh1: 0x000a
servoMin: 0x0096 // (150)10
servoMax: 0x0258 // (600)10
servoCen: 0x0177 //(375)10
servoInitPrescale: 0xff8f // prescale = - 25000000/(4096*60*0.9) = 0xFF8F
servoInit_RtnCode: 0x0000
getLight: push getLight_jmp
bor
pop getLight_rtn
pop getLight_valAddr
PUSHI getLight_rtnval // push arg1... the address for receiving the result(temprature)
PUSH lightReadReg // push the register no. 0
push lightAddr // push the I2C light sensor address, 0x4b
pushi getLight_a0 // push the return address
JMP ri2c1 // call the ri2c1 ... read 1 byte data from the i2c device,
getLight_a0: pop getLight_rtncode
PUSH getLight_rtnval // push arg1... the i2c slave Addr
OUT
push getLight_valAddr
push getLight_rtnval
st
pushi 1
getLight_rtn: 0x0000 //
getLight_jmp: 0x4000
getLight_rtncode: 0x0000
getLight_rtnval: 0x0000
getLight_valAddr: 0x0000
lightReadReg: 0x008d // read 1 byte from the register d, IR+visible
lightAddr: 0x0029 // grove i2c light sensor
waitLoop: push waitLoop_jmp
bor
pop waitLoop_rtn
pop waitLoop_times
waitLoop_a0: push waitLoop_times
pushi 1
sub
pop waitLoop_times
push waitLoop_times
jnz waitLoop_a0
pushi 0
waitLoop_rtn: 0x0000
waitLoop_jmp: 0x4000
waitLoop_times: 0x000
wi2c1: PUSH wi2c1_jmp // subroutine. the 1st step to make the return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP wi2c1_rtn // save the return instruction
POP wi2c1_addr // save the arg1, the i2c slave address
pop wi2c1_reg // save the arg2, destination register address
pop wi2c1_val // save the value which will be assiinged to the destination register.
PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI wi2c1_a1 // push the return address
JMP SubI2C1 // call the subroutine
wi2c1_a1: push wi2c1_addr
pushi 1
shl // make the i2c device address with the write flag
pushi wi2c1_a2
jmp si2c1
wi2c1_a2: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c1_a3 //
JMP SubI2C1 // call the subroutine
wi2c1_a3: in // input the ack
pushi 0x01
band
jz wi2c1_a3_1
pushi 1 // error to read the ack of the i2c address
jmp wi2c1_err
wi2c1_a3_1: push wi2c1_reg
pushi wi2c1_a4
jmp si2c1
wi2c1_a4: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c1_a5 //
JMP SubI2C1 // call the subroutine
wi2c1_a5: in // input the ack
pushi 0x01
band
jz wi2c1_a5_1
pushi 2 // error to read the ack of the i2c register no.
jmp wi2c1_err
wi2c1_a5_1: push wi2c1_val
pushi wi2c1_a6
jmp si2c1
wi2c1_a6: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c1_a7 //
JMP SubI2C1 // call the subroutine
wi2c1_a7: in // input the ack
pushi 0x01
band
jz wi2c1_a7_1
pushi 3 // error to read the ack of the i2c register val.
jmp wi2c1_err
wi2c1_a7_1: PUSHI i2cStop // push arg1 .... write the ack
PUSHI wi2c1_a8 // push the return address
JMP SubI2C1 // call the subroutine
wi2c1_a8: pushI 0
wi2c1_rtn: jmp 0x000 // return
wi2c1_err: pop wi2c1_ercode
PUSHI i2cStop // push arg1 .... write the ack
PUSHI wi2c1_a9 // push the return address
JMP SubI2C1 // call the subroutine
wi2c1_a9: push wi2c1_ercode
jmp wi2c1_rtn
wi2c1_jmp: 0x4000
wi2c1_addr: 0x0000
wi2c1_reg: 0x0000
wi2c1_val: 0x0000
wi2c1\ercode: 0x0000
wi2c2: PUSH wi2c2_jmp // subroutine. the 1st step to make the return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP wi2c2_rtn // save the return instruction
POP wi2c2_addr // save the arg1, the i2c slave address
pop wi2c2_reg // save the arg2, destination register address
pop wi2c2_val // save the value which will be assiinged to the destination register.
PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI wi2c2_a1 // push the return address
JMP SubI2C1 // call the subroutine
wi2c2_a1: push wi2c2_addr
pushi 1
shl // make the i2c device address with the write flag
pop wi2c2_waddr
pushi wi2c2_a2
jmp si2c1
wi2c2_a2: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c2_a3 //
JMP SubI2C1 // call the subroutine
wi2c2_a3: in // input the ack
pushi 0x01
band
jz wi2c2_a3_1
pushi 1 // error to read the ack of the i2c address
jmp wi2c2_err
wi2c2_a3_1: push wi2c2_reg
pushi wi2c2_a4
jmp si2c1
wi2c2_a4: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c2_a5 //
JMP SubI2C1 // call the subroutine
wi2c2_a5: in // input the ack
pushi 0x01 band jz wi2c2_a5_1 pushi 2 // error to read the ack of the i2c register no. jmp wi2c2_err
wi2c_a5_1: push wi2c2_val
pushi 0x00ff
band
pushi wi2c2_a6
jmp si2c1
wi2c2_a6: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c2_a7 //
JMP SubI2C1 // call the subroutine
wi2c2_a7: in // input the ack
pushi 0x01
band
jz wi2c2_a7_1
pushi 3 // error to read the ack of the i2c register no.
jmp wi2c2_err
wi2c2_a7_1: push wi2c2_val
pushi 8
shr
pushi wi2c2_a8
jmp si2c1
wi2c2_a8: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c2_a9 //
JMP SubI2C1 // call the subroutine
wi2c2_a9: in // input the ack
pushi 0x01
band
jz wi2c2_a9_1
pushi 4 // error to read the ack of the i2c register no.
jmp wi2c2_err
wi2c2_a9_1: PUSHI i2cStop // push arg1 .... write the ack
PUSHI wi2c2_a10 // push the return address
JMP SubI2C1 // call the subroutine
wi2c2_a10: pushI 0
wi2c2_rtn: jmp 0x000 // return
wi2c2_err: pop wi2c2_ercode
PUSHI i2cStop // push arg1 .... write the ack
PUSHI wi2c2_a11 // push the return address
JMP SubI2C1 // call the subroutine
wi2c2_a11: push wi2c2_ercode
jmp wi2c2_rtn
wi2c2_jmp: 0x4000
wi2c2_addr: 0x0000
wi2c2_reg: 0x0000
wi2c2_val: 0x0000
wi2c2_ercode: 0x0000
wi2c4: PUSH wi2c4_jmp // subroutine. the 1st step to make the return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP wi2c4_rtn // save the return instruction
POP wi2c4_addr // save the arg1, the i2c slave address
pop wi2c4_reg // save the arg2, destination register address
pop wi2c4_val2 // save the 1st value which will be assiinged to the destination registers.
pop wi2c4_val1 // save the 2nd value which will be assiinged to the destination register2.
PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI wi2c4_a1 // push the return address
JMP SubI2C1 // call the subroutine
wi2c4_a1: push wi2c4_addr
pushi 1
shl // make the i2c device address with the write flag
pushi wi2c4_a2
jmp si2c1
wi2c4_a2: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c4_a3 //
JMP SubI2C1 // call the subroutine
wi2c4_a3: in // input the ack
pushi 0x01
band
jz wi2c4_a3_1
pushi 1 // error to read the ack of the i2c address
jmp wi2c4_err
wi2c4_a3_1: push wi2c4_reg
pushi wi2c4_a4
jmp si2c1
wi2c4_a4: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c4_a5 //
JMP SubI2C1 // call the subroutine
wi2c4_a5: in // input the ack
pushi 0x01
band
jz wi2c4_a5_1
pushi 2 // error to read the ack of the i2c register no.
jmp wi2c4_err
wi2c4_a5_1: push wi2c4_val1
pushi 0x00ff
band
pushi wi2c4_a6
jmp si2c1
wi2c4_a6: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c4_a7 //
JMP SubI2C1 // call the subroutine
wi2c4_a7: in // input the ack
pushi 0x01
band
jz wi2c4_a7_1
pushi 3 // error to read the ack of the lsb of the val1
jmp wi2c4_err
wi2c4_a7_1: push wi2c4_val1
pushi 8
shr
pushi wi2c4_a8
jmp si2c1
wi2c4_a8: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c4_a9 //
JMP SubI2C1 // call the subroutine
wi2c4_a9: in // input the ack
pushi 0x01
band
jz wi2c4_a9_1
pushi 4 // error to read the ack of the msb of the val1
jmp wi2c4_err
wi2c4_a9_1: push wi2c4_val2
pushi 0x00ff
band
pushi wi2c4_a10
jmp si2c1
wi2c4_a10: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c4_a11 //
JMP SubI2C1 // call the subroutine
wi2c4_a11: in // input the ack
pushi 0x01
band
jz wi2c4_a11_1
pushi 5 // error to read the ack of the lsb of the val1
jmp wi2c4_err
wi2c4_a11_1: push wi2c4_val2
pushi 8
shr
pushi wi2c4_a12
jmp si2c1
wi2c4_a12: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI wi2c4_a13 //
JMP SubI2C1 // call the subroutine
wi2c4_a13: in // input the ack
pushi 0x01
band
jz wi2c4_a13_1
pushi 6 // error to read the ack of the lsb of the val1
jmp wi2c4_err
wi2c4_a13_1: PUSHI i2cStop // push arg1 .... write the ack
PUSHI wi2c4_a14 // push the return address
JMP SubI2C1 // call the subroutine
wi2c4_a14: pushI 0
wi2c4_rtn: jmp 0x000 // return
wi2c4_err: pop wi2c4_ercode
PUSHI i2cStop // push arg1 .... write the ack
PUSHI wi2c4_a15 // push the return address
JMP SubI2C1 // call the subroutine
wi2c4_a15: push wi2c4_ercode
jmp wi2c4_rtn
wi2c4_jmp: 0x4000
wi2c4_addr: 0x0000
wi2c4_reg: 0x0000
wi2c4_val1: 0x0000
wi2c4_val2: 0x0000
wi2c4_ercode: 0x0000
si2c1: PUSH si2c1_jmp // subroutine. the 1st step to make the return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP si2c1_rtn // save the return instruction
POP si2c1_val
PUSHI 8
POP si2c1_i
si2c1_a3: push si2c1_val
pushi 0x0080
band
JNZ si2c1_a1
pushi 0x0000
out
pushi 0x0002
out
pushi 0x0000
out
jmp si2c1_a2
si2c1_a1: pushi 0x0001
out
pushi 0x0003
out
pushi 0x0001
out
si2c1_a2: push si2c1_val
pushi 1
shl
pop si2c1_val
push si2c1_i
pushi 1
sub
pop si2c1_i
push si2c1_i
jnz si2c1_a3
si2c1_rtn: jmp 0x000
si2c1_jmp: 0x4000
si2c1_val: 0x0000
si2c1_i: 0x0000
ri2c1: PUSH ri2c1_jmp // subroutine. the 1st step to make the return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP ri2c1_rtn // save the return instruction
POP ri2c1_addr // save the arg1, the i2c slave address
pop ri2c1_reg // save the arg2, destination register address
pop ri2c1_raddr // save the address which receives the value of the destination register.
PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI ri2c1_a1 // push the return address
JMP SubI2C1 // call the subroutine
ri2c1_a1: push ri2c1_addr
pushi 1
shl // make the i2c device address with the write flag
pushi ri2c1_a2
jmp si2c1
ri2c1_a2: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI ri2c1_a3 //
JMP SubI2C1 // call the subroutine
ri2c1_a3: in // input the ack
pushi 0x01
band
jz ri2c1_a3_1
pushi 1 // error to read the ack of the i2c address
jmp ri2c1_err
ri2c1_a3_1: push ri2c1_reg
pushi ri2c1_a4
jmp si2c1
ri2c1_a4: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI ri2c1_a5 //
JMP SubI2C1 // call the subroutine
ri2c1_a5: in // input the ack
pushi 0x01
band
jz ri2c1_a5_1
pushi 2 // error to read the ack of the i2c register no.
jmp ri2c1_err
ri2c1_a5_1: PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI ri2c1_a6 // push the return address
JMP SubI2C1 // call the subroutine
ri2c1_a6: push ri2c1_addr
pushi 1
shl // make the i2c device address with the read flag
pushi 0x0001
BOR
pushi ri2c1_a7
jmp si2c1
ri2c1_a7: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI ri2c1_a8 //
JMP SubI2C1 // call the subroutine
ri2c1_a8: in // input the ack
pushi 0x01
band
jz ri2c1_a8_1
pushi 3 // error to read the ack of the i2c address again.
jmp ri2c1_err
ri2c1_a8_1: pushi i2cRead
pushi ri2c1_a9
jmp SubI2C1
ri2c1_a9: push ri2c1_raddr
in
st
PUSHI i2cNAck // push arg1 .... Ack
PUSHI ri2c1_a10 //
JMP SubI2C1 // call the subroutine
ri2c1_a10: PUSHI i2cStop // push arg1 .... write the ack
PUSHI ri2c1_a11 // push the return address
JMP SubI2C1 // call the subroutine
ri2c1_a11: pushI 0
ri2c1_rtn: jmp 0x000 // return
ri2c1_err: pop ri2c1_ercode
PUSHI i2cStop // push arg1 .... write the ack
PUSHI ri2c1_a12 // push the return address
JMP SubI2C1 // call the subroutine
ri2c1_a12: push ri2c1_ercode
jmp ri2c1_rtn
ri2c1_jmp: 0x4000
ri2c1_addr: 0x0000
ri2c1_reg: 0x0000
ri2c1_raddr: 0x0000
ri2c1_ercode: 0x0000
ri2c2: PUSH ri2c2_jmp // subroutine. the 1st step to make the return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP ri2c2_rtn // save the return instruction
POP ri2c2_addr // save the arg1, the i2c slave address
pop ri2c2_reg // save the arg2, destination register address
pop ri2c2_raddr // save the address which receives the value of the destination register.
PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI ri2c2_a1 // push the return address
JMP SubI2C1 // call the subroutine
ri2c2_a1: push ri2c2_addr
pushi 1
shl // make the i2c device address with the write flag
pushi ri2c2_a2
jmp si2c1
ri2c2_a2: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI ri2c2_a3 //
JMP SubI2C1 // call the subroutine
ri2c2_a3: in // input the ack
pushi 0x01
band
jz ri2c2_a3_1
pushi 1 // error to read the ack of the i2c address
jmp ri2c2_err
ri2c2_a3_1: push ri2c2_reg
pushi ri2c2_a4
jmp si2c1
ri2c2_a4: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI ri2c2_a5 //
JMP SubI2C1 // call the subroutine
ri2c2_a5: in // input the ack
pushi 0x01
band
jz ri2c2_a5_1
pushi 2 // error to read the ack of the i2c register no.
jmp ri2c2_err
ri2c2_a5_1: PUSHI i2cStart // push arg1... the i2c slave Addr
PUSHI ri2c2_a6 // push the return address
JMP SubI2C1 // call the subroutine
ri2c2_a6: push ri2c2_addr
pushi 1
shl // make the i2c device address with the read flag
pushi 0x0001
BOR
pushi ri2c2_a7
jmp si2c1
ri2c2_a7: PUSHI i2cRAck // push arg1 .... read the ack
PUSHI ri2c2_a8 //
JMP SubI2C1 // call the subroutine
ri2c2_a8: in // input the ack
pushi 0x01
band
jz ri2c2_a8_1
pushi 3 // error to read the ack of the i2c address again.
jmp ri2c2_err
ri2c2_a8_1: pushi i2cRead
pushi ri2c2_l9
jmp SubI2C1
ri2c2_l9: in
pushi 8
shl
pop ri2c2_val1
PUSHI i2cWAck // push arg1 .... write the ack
PUSHI ri2c2_a10 //
JMP SubI2C1 // call the subroutine
ri2c2_a10: pushi i2cRead
pushi ri2c2_a11
jmp SubI2C1
ri2c2_a11: push ri2c2_raddr
in
push ri2c2_val1
bor
st
PUSHI i2cNAck // push arg1 .... Ack
PUSHI ri2c2_a12 //
JMP SubI2C1 // call the subroutine
ri2c2_a12: PUSHI i2cStop // push arg1 .... write the ack
PUSHI ri2c2_a13 // push the return address
JMP SubI2C1 // call the subroutine
ri2c2_a13: pushI 0 // no error
ri2c2_rtn: jmp 0x000 // return
ri2c2_err: pop ri2c2_ercode
PUSHI i2cStop // push arg1 .... write the ack
PUSHI ri2c2_a14 // push the return address
JMP SubI2C1 // call the subroutine
ri2c2_a14: push ri2c2_ercode
jmp ri2c2_rtn
ri2c2_jmp: 0x4000
ri2c2_addr: 0x0000
ri2c2_reg: 0x0000
ri2c2_raddr: 0x0000
ri2c2_val1: 0x0000
ri2c2_ercode: 0x0000
SubI2C1: PUSH LblJMP // subroutine. the 1st step to return instruction
BOR // make the return instruction using arg1 and the previous instruction
POP RtnSub1 // save the return instruction
POP Sub1Data2 // save the arg1
PUSH Sub1Data2
LD
POP N
PUSH Sub1Data2
PUSHI 1
ADD
POP Sub1SA
PUSHI 0
POP i
L1: PUSH i
PUSH Sub1SA
ADD
LD //... Sub1S[i];
OUT //... print(Sub1S[i]) ;
PUSH i
PUSHI 1
ADD
POP i
PUSH i
PUSH N
SUB
JNZ L1 // if(i<n) goto L1;
RtnSub1: JMP 0x000 // return
LblJMP: 0x4000
Sub1Data2: 0x0000
Sub1SA: 0x0000
i: 0x0000
N: 0x0000
i2cStart: 3
1 //01
3 //11
2 //10
0 //00
i2cAddrW: 3
0 // 00
2 // 10 send 0 ... write
0 // 00
i2cAddrR: 3
1 // 01
3 // 11 ... read
1 // 01
i2cRAck: 3
1 // 01
3 // 11 read ack
1 // 01
i2cWAck: 3
0 // 00
2 // 10 send 0 ... write
0 // 00
i2cNAck: 3
1 //01
3 // ... read
1 //
i2cStop: 3
2 // 10
3 // 11 stop the transfering
3 // 11
i2cRead: 0x0011
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
3 // 11
1 // 01
mem[12'h000]=16'h1002 ; // pushi main_a0 mem[12'h001]=16'h4058 ; // jmp servoInit mem[12'h002]=16'h5006 ; //main_a0: jz main_a0_1 mem[12'h003]=16'h1000 ; // pushi 0x00 mem[12'h004]=16'he000 ; // out mem[12'h005]=16'h0000 ; // halt mem[12'h006]=16'h1000 ; //main_a0_1: pushi 0 mem[12'h007]=16'h20be ; // push servoCen mem[12'h008]=16'h20ba ; // push servoCh0 mem[12'h009]=16'h20b6 ; // push servoAddr mem[12'h00a]=16'h100c ; // pushi main_a1 mem[12'h00b]=16'h4175 ; // jmp wi2c4 mem[12'h00c]=16'h5010 ; //main_a1: jz main_a1_1 mem[12'h00d]=16'h1001 ; // pushi 0x01 mem[12'h00e]=16'he000 ; // out mem[12'h00f]=16'h0000 ; // halt mem[12'h010]=16'h100f ; //main_a1_1: pushi 0x000f mem[12'h011]=16'h1013 ; // pushi main_a2 mem[12'h012]=16'h40d8 ; // jmp waitLoop mem[12'h013]=16'h5017 ; //main_a2: jz main_a2_1 mem[12'h014]=16'h1002 ; // pushi 0x02 mem[12'h015]=16'he000 ; // out mem[12'h016]=16'h0000 ; // halt mem[12'h017]=16'h1000 ; //main_a2_1: pushi 0 mem[12'h018]=16'h20bc ; // push servoMin mem[12'h019]=16'h20ba ; // push servoCh0 mem[12'h01a]=16'h20b6 ; // push servoAddr mem[12'h01b]=16'h101d ; // pushi main_a3 mem[12'h01c]=16'h4175 ; // jmp wi2c4 mem[12'h01d]=16'h5021 ; //main_a3: jz main_a3_1 mem[12'h01e]=16'h1003 ; // pushi 0x03 mem[12'h01f]=16'he000 ; // out mem[12'h020]=16'h0000 ; // halt mem[12'h021]=16'h100f ; //main_a3_1: pushi 0x000f mem[12'h022]=16'h1024 ; // pushi main_a4 mem[12'h023]=16'h40d8 ; // jmp waitLoop mem[12'h024]=16'h5028 ; //main_a4: jz main_a4_1 mem[12'h025]=16'h1004 ; // pushi 0x04 mem[12'h026]=16'he000 ; // out mem[12'h027]=16'h0000 ; // halt mem[12'h028]=16'h1000 ; //main_a4_1: pushi 0 mem[12'h029]=16'h20be ; // push servoCen mem[12'h02a]=16'h20ba ; // push servoCh0 mem[12'h02b]=16'h20b6 ; // push servoAddr mem[12'h02c]=16'h102e ; // pushi main_a5 mem[12'h02d]=16'h4175 ; // jmp wi2c4 mem[12'h02e]=16'h5032 ; //main_a5: jz main_a5_1 mem[12'h02f]=16'h1005 ; // pushi 0x05 mem[12'h030]=16'he000 ; // out mem[12'h031]=16'h0000 ; // halt mem[12'h032]=16'h100f ; //main_a5_1: pushi 0x000f mem[12'h033]=16'h1035 ; // pushi main_a6 mem[12'h034]=16'h40d8 ; // jmp waitLoop mem[12'h035]=16'h5039 ; //main_a6: jz main_a6_1 mem[12'h036]=16'h1006 ; // pushi 0x06 mem[12'h037]=16'he000 ; // out mem[12'h038]=16'h0000 ; // halt mem[12'h039]=16'h1000 ; //main_a6_1: pushi 0 mem[12'h03a]=16'h20bd ; // push servoMax mem[12'h03b]=16'h20ba ; // push servoCh0 mem[12'h03c]=16'h20b6 ; // push servoAddr mem[12'h03d]=16'h103f ; // pushi main_a7 mem[12'h03e]=16'h4175 ; // jmp wi2c4 mem[12'h03f]=16'h5043 ; //main_a7: jz main_a7_1 mem[12'h040]=16'h1007 ; // pushi 0x07 mem[12'h041]=16'he000 ; // out mem[12'h042]=16'h0000 ; // halt mem[12'h043]=16'h100f ; //main_a7_1: pushi 0x000f mem[12'h044]=16'h1046 ; // pushi main_a8 mem[12'h045]=16'h40d8 ; // jmp waitLoop mem[12'h046]=16'h504a ; //main_a8: jz main_a8_1 mem[12'h047]=16'h1008 ; // pushi 0x08 mem[12'h048]=16'he000 ; // out mem[12'h049]=16'h0000 ; // halt mem[12'h04a]=16'h1000 ; //main_a8_1: pushi 0 mem[12'h04b]=16'h20be ; // push servoCen mem[12'h04c]=16'h20ba ; // push servoCh0 mem[12'h04d]=16'h20b6 ; // push servoAddr mem[12'h04e]=16'h1050 ; // pushi main_a9 mem[12'h04f]=16'h4175 ; // jmp wi2c4 mem[12'h050]=16'h5054 ; //main_a9: jz main_a9_1 mem[12'h051]=16'h1009 ; // pushi 0x09 mem[12'h052]=16'he000 ; // out mem[12'h053]=16'h0000 ; // halt mem[12'h054]=16'h1010 ; //main_a9_1: pushi 0x10 mem[12'h055]=16'he000 ; // out mem[12'h056]=16'h0000 ; // halt mem[12'h057]=16'h0000 ; //main_rcode: 0x0000 mem[12'h058]=16'h20b5 ; //servoInit: push servoInit_jmp mem[12'h059]=16'hf006 ; // bor mem[12'h05a]=16'h30b4 ; // pop servoInit_rtn mem[12'h05b]=16'h1000 ; // pushi 0x00 mem[12'h05c]=16'h20b7 ; // push servoMode1 mem[12'h05d]=16'h20b6 ; // push servoAddr mem[12'h05e]=16'h1060 ; // pushi servoInit_a0 mem[12'h05f]=16'h40e6 ; // jmp wi2c1 mem[12'h060]=16'h30c0 ; //servoInit_a0: pop servoInit_RtnCode? mem[12'h061]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h062]=16'h5068 ; // jz servoInit_a0_1 mem[12'h063]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h064]=16'he000 ; // out mem[12'h065]=16'h0000 ; // halt mem[12'h066]=16'h1011 ; // pushi 11 mem[12'h067]=16'h40b4 ; // jmp servoInit_rtn mem[12'h068]=16'h10b8 ; //servoInit_a0_1: pushi servoMode1Val mem[12'h069]=16'h20b7 ; // push servoMode1 mem[12'h06a]=16'h20b6 ; // push servoAddr mem[12'h06b]=16'h106d ; // pushi servoInit_a1 mem[12'h06c]=16'h4207 ; // jmp ri2c1 mem[12'h06d]=16'h30c0 ; //servoInit_a1: pop servoInit_RtnCode? mem[12'h06e]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h06f]=16'h5075 ; // jz servoInit_a1_1 mem[12'h070]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h071]=16'he000 ; // out mem[12'h072]=16'h0000 ; // halt mem[12'h073]=16'h1001 ; // pushi 1 mem[12'h074]=16'h40b4 ; // jmp servoInit_rtn mem[12'h075]=16'h20b8 ; //servoInit_a1_1: push servoMode1Val mem[12'h076]=16'h107f ; // pushi 0x7f mem[12'h077]=16'hf005 ; // band mem[12'h078]=16'h1010 ; // pushi 0x10 mem[12'h079]=16'hf006 ; // bor mem[12'h07a]=16'h20b7 ; // push servoMode1 mem[12'h07b]=16'h20b6 ; // push servoAddr mem[12'h07c]=16'h107e ; // pushi servoInit_a2 mem[12'h07d]=16'h40e6 ; // jmp wi2c1 mem[12'h07e]=16'h30c0 ; //servoInit_a2: pop servoInit_RtnCode? mem[12'h07f]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h080]=16'h5086 ; // jz servoInit_a2_1 mem[12'h081]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h082]=16'he000 ; // out mem[12'h083]=16'h0000 ; // halt mem[12'h084]=16'h1002 ; // pushi 2 mem[12'h085]=16'h40b4 ; // jmp servoInit_rtn mem[12'h086]=16'h1070 ; //servoInit_a2_1: pushi 0x70 mem[12'h087]=16'h20b9 ; // push servoPreScale? mem[12'h088]=16'h20b6 ; // push servoAddr mem[12'h089]=16'h108b ; // pushi servoInit_a3 mem[12'h08a]=16'h40e6 ; // jmp wi2c1 mem[12'h08b]=16'h30c0 ; //servoInit_a3: pop servoInit_RtnCode? mem[12'h08c]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h08d]=16'h5093 ; // jz servoInit_a3_1 mem[12'h08e]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h08f]=16'he000 ; // out mem[12'h090]=16'h0000 ; // halt mem[12'h091]=16'h1003 ; // pushi 3 mem[12'h092]=16'h40b4 ; // jmp servoInit_rtn mem[12'h093]=16'h20b8 ; //servoInit_a3_1: push servoMode1Val mem[12'h094]=16'h20b7 ; // push servoMode1 mem[12'h095]=16'h20b6 ; // push servoAddr mem[12'h096]=16'h1098 ; // pushi servoInit_a4 mem[12'h097]=16'h40e6 ; // jmp wi2c1 mem[12'h098]=16'h30c0 ; //servoInit_a4: pop servoInit_RtnCode? mem[12'h099]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h09a]=16'h50a0 ; // jz servoInit_a4_1 mem[12'h09b]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h09c]=16'he000 ; // out mem[12'h09d]=16'h0000 ; // halt mem[12'h09e]=16'h1004 ; // pushi 4 mem[12'h09f]=16'h40b4 ; // jmp servoInit_rtn mem[12'h0a0]=16'h100f ; //servoInit_a4_1: pushi 0x000f mem[12'h0a1]=16'h10a3 ; // pushi servoInit_a5 mem[12'h0a2]=16'h40d8 ; // jmp waitLoop mem[12'h0a3]=16'h30c0 ; //servoInit_a5: pop servoInit_RtnCode? mem[12'h0a4]=16'h20b8 ; // push servoMode1Val mem[12'h0a5]=16'h10a1 ; // pushi 0x00a1 mem[12'h0a6]=16'hf006 ; // bor mem[12'h0a7]=16'h20b7 ; // push servoMode1 mem[12'h0a8]=16'h20b6 ; // push servoAddr mem[12'h0a9]=16'h10ab ; // pushi servoInit_a6 mem[12'h0aa]=16'h40e6 ; // jmp wi2c1 mem[12'h0ab]=16'h30c0 ; //servoInit_a6: pop servoInit_RtnCode? mem[12'h0ac]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h0ad]=16'h50b3 ; // jz servoInit_a6_1 mem[12'h0ae]=16'h20c0 ; // push servoInit_RtnCode? mem[12'h0af]=16'he000 ; // out mem[12'h0b0]=16'h0000 ; // halt mem[12'h0b1]=16'h1006 ; // pushi 6 mem[12'h0b2]=16'h40b4 ; // jmp servoInit_rtn mem[12'h0b3]=16'h1000 ; //servoInit_a6_1: pushi 0 mem[12'h0b4]=16'h0000 ; //servoInit_rtn: 0x0000 mem[12'h0b5]=16'h4000 ; //servoInit_jmp: 0x4000 mem[12'h0b6]=16'h0040 ; //servoAddr: 0x0040 mem[12'h0b7]=16'h0000 ; //servoMode1: 0x0000 mem[12'h0b8]=16'h0000 ; //servoMode1Val: 0x0000 mem[12'h0b9]=16'h00fe ; //servoPreScale?: 0x00fe mem[12'h0ba]=16'h0006 ; //servoCh0: 0x0006 mem[12'h0bb]=16'h000a ; //servoCh1: 0x000a mem[12'h0bc]=16'h0096 ; //servoMin: 0x0096 mem[12'h0bd]=16'h0258 ; //servoMax: 0x0258 mem[12'h0be]=16'h0177 ; //servoCen: 0x0177 mem[12'h0bf]=16'hff8f ; //servoInitPrescale?: 0xff8f mem[12'h0c0]=16'h0000 ; //servoInit_RtnCode?: 0x0000 mem[12'h0c1]=16'h20d2 ; //getLight: push getLight_jmp mem[12'h0c2]=16'hf006 ; // bor mem[12'h0c3]=16'h30d1 ; // pop getLight_rtn mem[12'h0c4]=16'h30d5 ; // pop getLight_valAddr mem[12'h0c5]=16'h10d4 ; // PUSHI getLight_rtnval mem[12'h0c6]=16'h20d6 ; // PUSH lightReadReg? mem[12'h0c7]=16'h20d7 ; // push lightAddr mem[12'h0c8]=16'h10ca ; // pushi getLight_a0 mem[12'h0c9]=16'h4207 ; // JMP ri2c1 mem[12'h0ca]=16'h30d3 ; //getLight_a0: pop getLight_rtncode mem[12'h0cb]=16'h20d4 ; // PUSH getLight_rtnval mem[12'h0cc]=16'he000 ; // OUT mem[12'h0cd]=16'h20d5 ; // push getLight_valAddr mem[12'h0ce]=16'h20d4 ; // push getLight_rtnval mem[12'h0cf]=16'h8000 ; // st mem[12'h0d0]=16'h1001 ; // pushi 1 mem[12'h0d1]=16'h0000 ; //getLight_rtn: 0x0000 mem[12'h0d2]=16'h4000 ; //getLight_jmp: 0x4000 mem[12'h0d3]=16'h0000 ; //getLight_rtncode: 0x0000 mem[12'h0d4]=16'h0000 ; //getLight_rtnval: 0x0000 mem[12'h0d5]=16'h0000 ; //getLight_valAddr: 0x0000 mem[12'h0d6]=16'h008d ; //lightReadReg?: 0x008d mem[12'h0d7]=16'h0029 ; //lightAddr: 0x0029 mem[12'h0d8]=16'h20e4 ; //waitLoop: push waitLoop_jmp mem[12'h0d9]=16'hf006 ; // bor mem[12'h0da]=16'h30e3 ; // pop waitLoop_rtn mem[12'h0db]=16'h30e5 ; // pop waitLoop_times mem[12'h0dc]=16'h20e5 ; //waitLoop_a0: push waitLoop_times mem[12'h0dd]=16'h1001 ; // pushi 1 mem[12'h0de]=16'hf001 ; // sub mem[12'h0df]=16'h30e5 ; // pop waitLoop_times mem[12'h0e0]=16'h20e5 ; // push waitLoop_times mem[12'h0e1]=16'h60dc ; // jnz waitLoop_a0 mem[12'h0e2]=16'h1000 ; // pushi 0 mem[12'h0e3]=16'h0000 ; //waitLoop_rtn: 0x0000 mem[12'h0e4]=16'h4000 ; //waitLoop_jmp: 0x4000 mem[12'h0e5]=16'h0000 ; //waitLoop_times: 0x000 mem[12'h0e6]=16'h2120 ; //wi2c1: PUSH wi2c1_jmp mem[12'h0e7]=16'hf006 ; // BOR mem[12'h0e8]=16'h3119 ; // POP wi2c1_rtn mem[12'h0e9]=16'h3121 ; // POP wi2c1_addr mem[12'h0ea]=16'h3122 ; // pop wi2c1_reg mem[12'h0eb]=16'h3123 ; // pop wi2c1_val mem[12'h0ec]=16'h12d2 ; // PUSHI i2cStart mem[12'h0ed]=16'h10ef ; // PUSHI wi2c1_a1 mem[12'h0ee]=16'h42b2 ; // JMP SubI2C1 mem[12'h0ef]=16'h2121 ; //wi2c1_a1: push wi2c1_addr mem[12'h0f0]=16'h1001 ; // pushi 1 mem[12'h0f1]=16'hf003 ; // shl mem[12'h0f2]=16'h10f4 ; // pushi wi2c1_a2 mem[12'h0f3]=16'h41e2 ; // jmp si2c1 mem[12'h0f4]=16'h12df ; //wi2c1_a2: PUSHI i2cRAck mem[12'h0f5]=16'h10f7 ; // PUSHI wi2c1_a3 mem[12'h0f6]=16'h42b2 ; // JMP SubI2C1 mem[12'h0f7]=16'hd000 ; //wi2c1_a3: in mem[12'h0f8]=16'h1001 ; // pushi 0x01 mem[12'h0f9]=16'hf005 ; // band mem[12'h0fa]=16'h50fd ; // jz wi2c1_a3_1 mem[12'h0fb]=16'h1001 ; // pushi 1 mem[12'h0fc]=16'h411a ; // jmp wi2c1_err mem[12'h0fd]=16'h2122 ; //wi2c1_a3_1: push wi2c1_reg mem[12'h0fe]=16'h1100 ; // pushi wi2c1_a4 mem[12'h0ff]=16'h41e2 ; // jmp si2c1 mem[12'h100]=16'h12df ; //wi2c1_a4: PUSHI i2cRAck mem[12'h101]=16'h1103 ; // PUSHI wi2c1_a5 mem[12'h102]=16'h42b2 ; // JMP SubI2C1 mem[12'h103]=16'hd000 ; //wi2c1_a5: in mem[12'h104]=16'h1001 ; // pushi 0x01 mem[12'h105]=16'hf005 ; // band mem[12'h106]=16'h5109 ; // jz wi2c1_a5_1 mem[12'h107]=16'h1002 ; // pushi 2 mem[12'h108]=16'h411a ; // jmp wi2c1_err mem[12'h109]=16'h2123 ; //wi2c1_a5_1: push wi2c1_val mem[12'h10a]=16'h110c ; // pushi wi2c1_a6 mem[12'h10b]=16'h41e2 ; // jmp si2c1 mem[12'h10c]=16'h12df ; //wi2c1_a6: PUSHI i2cRAck mem[12'h10d]=16'h110f ; // PUSHI wi2c1_a7 mem[12'h10e]=16'h42b2 ; // JMP SubI2C1 mem[12'h10f]=16'hd000 ; //wi2c1_a7: in mem[12'h110]=16'h1001 ; // pushi 0x01 mem[12'h111]=16'hf005 ; // band mem[12'h112]=16'h5115 ; // jz wi2c1_a7_1 mem[12'h113]=16'h1003 ; // pushi 3 mem[12'h114]=16'h411a ; // jmp wi2c1_err mem[12'h115]=16'h12eb ; //wi2c1_a7_1: PUSHI i2cStop mem[12'h116]=16'h1118 ; // PUSHI wi2c1_a8 mem[12'h117]=16'h42b2 ; // JMP SubI2C1 mem[12'h118]=16'h1000 ; //wi2c1_a8: pushI 0 mem[12'h119]=16'h4000 ; //wi2c1_rtn: jmp 0x000 mem[12'h11a]=16'h3000 ; //wi2c1_err: pop wi2c1_ercode mem[12'h11b]=16'h12eb ; // PUSHI i2cStop mem[12'h11c]=16'h111e ; // PUSHI wi2c1_a9 mem[12'h11d]=16'h42b2 ; // JMP SubI2C1 mem[12'h11e]=16'h2000 ; //wi2c1_a9: push wi2c1_ercode mem[12'h11f]=16'h4119 ; // jmp wi2c1_rtn mem[12'h120]=16'h4000 ; //wi2c1_jmp: 0x4000 mem[12'h121]=16'h0000 ; //wi2c1_addr: 0x0000 mem[12'h122]=16'h0000 ; //wi2c1_reg: 0x0000 mem[12'h123]=16'h0000 ; //wi2c1_val: 0x0000 mem[12'h124]=16'h0000 ; //wi2c1\ercode: 0x0000 mem[12'h125]=16'h2170 ; //wi2c2: PUSH wi2c2_jmp mem[12'h126]=16'hf006 ; // BOR mem[12'h127]=16'h3169 ; // POP wi2c2_rtn mem[12'h128]=16'h3171 ; // POP wi2c2_addr mem[12'h129]=16'h3172 ; // pop wi2c2_reg mem[12'h12a]=16'h3173 ; // pop wi2c2_val mem[12'h12b]=16'h12d2 ; // PUSHI i2cStart mem[12'h12c]=16'h112e ; // PUSHI wi2c2_a1 mem[12'h12d]=16'h42b2 ; // JMP SubI2C1 mem[12'h12e]=16'h2171 ; //wi2c2_a1: push wi2c2_addr mem[12'h12f]=16'h1001 ; // pushi 1 mem[12'h130]=16'hf003 ; // shl mem[12'h131]=16'h3000 ; // pop wi2c2_waddr mem[12'h132]=16'h1134 ; // pushi wi2c2_a2 mem[12'h133]=16'h41e2 ; // jmp si2c1 mem[12'h134]=16'h12df ; //wi2c2_a2: PUSHI i2cRAck mem[12'h135]=16'h1137 ; // PUSHI wi2c2_a3 mem[12'h136]=16'h42b2 ; // JMP SubI2C1 mem[12'h137]=16'hd000 ; //wi2c2_a3: in mem[12'h138]=16'h1001 ; // pushi 0x01 mem[12'h139]=16'hf005 ; // band mem[12'h13a]=16'h513d ; // jz wi2c2_a3_1 mem[12'h13b]=16'h1001 ; // pushi 1 mem[12'h13c]=16'h416a ; // jmp wi2c2_err mem[12'h13d]=16'h2172 ; //wi2c2_a3_1: push wi2c2_reg mem[12'h13e]=16'h1140 ; // pushi wi2c2_a4 mem[12'h13f]=16'h41e2 ; // jmp si2c1 mem[12'h140]=16'h12df ; //wi2c2_a4: PUSHI i2cRAck mem[12'h141]=16'h1143 ; // PUSHI wi2c2_a5 mem[12'h142]=16'h42b2 ; // JMP SubI2C1 mem[12'h143]=16'hd000 ; //wi2c2_a5: in mem[12'h144]=16'h1001 ; // pushi 0x01 mem[12'h145]=16'hf005 ; // band mem[12'h146]=16'h5000 ; // jz wi2c2_a5_1 mem[12'h147]=16'h1002 ; // pushi 2 mem[12'h148]=16'h416a ; // jmp wi2c2_err mem[12'h149]=16'h2173 ; //wi2c_a5_1: push wi2c2_val mem[12'h14a]=16'h10ff ; // pushi 0x00ff mem[12'h14b]=16'hf005 ; // band mem[12'h14c]=16'h114e ; // pushi wi2c2_a6 mem[12'h14d]=16'h41e2 ; // jmp si2c1 mem[12'h14e]=16'h12df ; //wi2c2_a6: PUSHI i2cRAck mem[12'h14f]=16'h1151 ; // PUSHI wi2c2_a7 mem[12'h150]=16'h42b2 ; // JMP SubI2C1 mem[12'h151]=16'hd000 ; //wi2c2_a7: in mem[12'h152]=16'h1001 ; // pushi 0x01 mem[12'h153]=16'hf005 ; // band mem[12'h154]=16'h5157 ; // jz wi2c2_a7_1 mem[12'h155]=16'h1003 ; // pushi 3 mem[12'h156]=16'h416a ; // jmp wi2c2_err mem[12'h157]=16'h2173 ; //wi2c2_a7_1: push wi2c2_val mem[12'h158]=16'h1008 ; // pushi 8 mem[12'h159]=16'hf004 ; // shr mem[12'h15a]=16'h115c ; // pushi wi2c2_a8 mem[12'h15b]=16'h41e2 ; // jmp si2c1 mem[12'h15c]=16'h12df ; //wi2c2_a8: PUSHI i2cRAck mem[12'h15d]=16'h115f ; // PUSHI wi2c2_a9 mem[12'h15e]=16'h42b2 ; // JMP SubI2C1 mem[12'h15f]=16'hd000 ; //wi2c2_a9: in mem[12'h160]=16'h1001 ; // pushi 0x01 mem[12'h161]=16'hf005 ; // band mem[12'h162]=16'h5165 ; // jz wi2c2_a9_1 mem[12'h163]=16'h1004 ; // pushi 4 mem[12'h164]=16'h416a ; // jmp wi2c2_err mem[12'h165]=16'h12eb ; //wi2c2_a9_1: PUSHI i2cStop mem[12'h166]=16'h1168 ; // PUSHI wi2c2_a10 mem[12'h167]=16'h42b2 ; // JMP SubI2C1 mem[12'h168]=16'h1000 ; //wi2c2_a10: pushI 0 mem[12'h169]=16'h4000 ; //wi2c2_rtn: jmp 0x000 mem[12'h16a]=16'h3174 ; //wi2c2_err: pop wi2c2_ercode mem[12'h16b]=16'h12eb ; // PUSHI i2cStop mem[12'h16c]=16'h116e ; // PUSHI wi2c2_a11 mem[12'h16d]=16'h42b2 ; // JMP SubI2C1 mem[12'h16e]=16'h2174 ; //wi2c2_a11: push wi2c2_ercode mem[12'h16f]=16'h4169 ; // jmp wi2c2_rtn mem[12'h170]=16'h4000 ; //wi2c2_jmp: 0x4000 mem[12'h171]=16'h0000 ; //wi2c2_addr: 0x0000 mem[12'h172]=16'h0000 ; //wi2c2_reg: 0x0000 mem[12'h173]=16'h0000 ; //wi2c2_val: 0x0000 mem[12'h174]=16'h0000 ; //wi2c2_ercode: 0x0000 mem[12'h175]=16'h21dc ; //wi2c4: PUSH wi2c4_jmp mem[12'h176]=16'hf006 ; // BOR mem[12'h177]=16'h31d5 ; // POP wi2c4_rtn mem[12'h178]=16'h31dd ; // POP wi2c4_addr mem[12'h179]=16'h31de ; // pop wi2c4_reg mem[12'h17a]=16'h31e0 ; // pop wi2c4_val2 mem[12'h17b]=16'h31df ; // pop wi2c4_val1 mem[12'h17c]=16'h12d2 ; // PUSHI i2cStart mem[12'h17d]=16'h117f ; // PUSHI wi2c4_a1 mem[12'h17e]=16'h42b2 ; // JMP SubI2C1 mem[12'h17f]=16'h21dd ; //wi2c4_a1: push wi2c4_addr mem[12'h180]=16'h1001 ; // pushi 1 mem[12'h181]=16'hf003 ; // shl mem[12'h182]=16'h1184 ; // pushi wi2c4_a2 mem[12'h183]=16'h41e2 ; // jmp si2c1 mem[12'h184]=16'h12df ; //wi2c4_a2: PUSHI i2cRAck mem[12'h185]=16'h1187 ; // PUSHI wi2c4_a3 mem[12'h186]=16'h42b2 ; // JMP SubI2C1 mem[12'h187]=16'hd000 ; //wi2c4_a3: in mem[12'h188]=16'h1001 ; // pushi 0x01 mem[12'h189]=16'hf005 ; // band mem[12'h18a]=16'h518d ; // jz wi2c4_a3_1 mem[12'h18b]=16'h1001 ; // pushi 1 mem[12'h18c]=16'h41d6 ; // jmp wi2c4_err mem[12'h18d]=16'h21de ; //wi2c4_a3_1: push wi2c4_reg mem[12'h18e]=16'h1190 ; // pushi wi2c4_a4 mem[12'h18f]=16'h41e2 ; // jmp si2c1 mem[12'h190]=16'h12df ; //wi2c4_a4: PUSHI i2cRAck mem[12'h191]=16'h1193 ; // PUSHI wi2c4_a5 mem[12'h192]=16'h42b2 ; // JMP SubI2C1 mem[12'h193]=16'hd000 ; //wi2c4_a5: in mem[12'h194]=16'h1001 ; // pushi 0x01 mem[12'h195]=16'hf005 ; // band mem[12'h196]=16'h5199 ; // jz wi2c4_a5_1 mem[12'h197]=16'h1002 ; // pushi 2 mem[12'h198]=16'h41d6 ; // jmp wi2c4_err mem[12'h199]=16'h21df ; //wi2c4_a5_1: push wi2c4_val1 mem[12'h19a]=16'h10ff ; // pushi 0x00ff mem[12'h19b]=16'hf005 ; // band mem[12'h19c]=16'h119e ; // pushi wi2c4_a6 mem[12'h19d]=16'h41e2 ; // jmp si2c1 mem[12'h19e]=16'h12df ; //wi2c4_a6: PUSHI i2cRAck mem[12'h19f]=16'h11a1 ; // PUSHI wi2c4_a7 mem[12'h1a0]=16'h42b2 ; // JMP SubI2C1 mem[12'h1a1]=16'hd000 ; //wi2c4_a7: in mem[12'h1a2]=16'h1001 ; // pushi 0x01 mem[12'h1a3]=16'hf005 ; // band mem[12'h1a4]=16'h51a7 ; // jz wi2c4_a7_1 mem[12'h1a5]=16'h1003 ; // pushi 3 mem[12'h1a6]=16'h41d6 ; // jmp wi2c4_err mem[12'h1a7]=16'h21df ; //wi2c4_a7_1: push wi2c4_val1 mem[12'h1a8]=16'h1008 ; // pushi 8 mem[12'h1a9]=16'hf004 ; // shr mem[12'h1aa]=16'h11ac ; // pushi wi2c4_a8 mem[12'h1ab]=16'h41e2 ; // jmp si2c1 mem[12'h1ac]=16'h12df ; //wi2c4_a8: PUSHI i2cRAck mem[12'h1ad]=16'h11af ; // PUSHI wi2c4_a9 mem[12'h1ae]=16'h42b2 ; // JMP SubI2C1 mem[12'h1af]=16'hd000 ; //wi2c4_a9: in mem[12'h1b0]=16'h1001 ; // pushi 0x01 mem[12'h1b1]=16'hf005 ; // band mem[12'h1b2]=16'h51b5 ; // jz wi2c4_a9_1 mem[12'h1b3]=16'h1004 ; // pushi 4 mem[12'h1b4]=16'h41d6 ; // jmp wi2c4_err mem[12'h1b5]=16'h21e0 ; //wi2c4_a9_1: push wi2c4_val2 mem[12'h1b6]=16'h10ff ; // pushi 0x00ff mem[12'h1b7]=16'hf005 ; // band mem[12'h1b8]=16'h11ba ; // pushi wi2c4_a10 mem[12'h1b9]=16'h41e2 ; // jmp si2c1 mem[12'h1ba]=16'h12df ; //wi2c4_a10: PUSHI i2cRAck mem[12'h1bb]=16'h11bd ; // PUSHI wi2c4_a11 mem[12'h1bc]=16'h42b2 ; // JMP SubI2C1 mem[12'h1bd]=16'hd000 ; //wi2c4_a11: in mem[12'h1be]=16'h1001 ; // pushi 0x01 mem[12'h1bf]=16'hf005 ; // band mem[12'h1c0]=16'h51c3 ; // jz wi2c4_a11_1 mem[12'h1c1]=16'h1005 ; // pushi 5 mem[12'h1c2]=16'h41d6 ; // jmp wi2c4_err mem[12'h1c3]=16'h21e0 ; //wi2c4_a11_1: push wi2c4_val2 mem[12'h1c4]=16'h1008 ; // pushi 8 mem[12'h1c5]=16'hf004 ; // shr mem[12'h1c6]=16'h11c8 ; // pushi wi2c4_a12 mem[12'h1c7]=16'h41e2 ; // jmp si2c1 mem[12'h1c8]=16'h12df ; //wi2c4_a12: PUSHI i2cRAck mem[12'h1c9]=16'h11cb ; // PUSHI wi2c4_a13 mem[12'h1ca]=16'h42b2 ; // JMP SubI2C1 mem[12'h1cb]=16'hd000 ; //wi2c4_a13: in mem[12'h1cc]=16'h1001 ; // pushi 0x01 mem[12'h1cd]=16'hf005 ; // band mem[12'h1ce]=16'h51d1 ; // jz wi2c4_a13_1 mem[12'h1cf]=16'h1006 ; // pushi 6 mem[12'h1d0]=16'h41d6 ; // jmp wi2c4_err mem[12'h1d1]=16'h12eb ; //wi2c4_a13_1: PUSHI i2cStop mem[12'h1d2]=16'h11d4 ; // PUSHI wi2c4_a14 mem[12'h1d3]=16'h42b2 ; // JMP SubI2C1 mem[12'h1d4]=16'h1000 ; //wi2c4_a14: pushI 0 mem[12'h1d5]=16'h4000 ; //wi2c4_rtn: jmp 0x000 mem[12'h1d6]=16'h31e1 ; //wi2c4_err: pop wi2c4_ercode mem[12'h1d7]=16'h12eb ; // PUSHI i2cStop mem[12'h1d8]=16'h11da ; // PUSHI wi2c4_a15 mem[12'h1d9]=16'h42b2 ; // JMP SubI2C1 mem[12'h1da]=16'h21e1 ; //wi2c4_a15: push wi2c4_ercode mem[12'h1db]=16'h41d5 ; // jmp wi2c4_rtn mem[12'h1dc]=16'h4000 ; //wi2c4_jmp: 0x4000 mem[12'h1dd]=16'h0000 ; //wi2c4_addr: 0x0000 mem[12'h1de]=16'h0000 ; //wi2c4_reg: 0x0000 mem[12'h1df]=16'h0000 ; //wi2c4_val1: 0x0000 mem[12'h1e0]=16'h0000 ; //wi2c4_val2: 0x0000 mem[12'h1e1]=16'h0000 ; //wi2c4_ercode: 0x0000 mem[12'h1e2]=16'h2204 ; //si2c1: PUSH si2c1_jmp mem[12'h1e3]=16'hf006 ; // BOR mem[12'h1e4]=16'h3203 ; // POP si2c1_rtn mem[12'h1e5]=16'h3205 ; // POP si2c1_val mem[12'h1e6]=16'h1008 ; // PUSHI 8 mem[12'h1e7]=16'h3206 ; // POP si2c1_i mem[12'h1e8]=16'h2205 ; //si2c1_a3: push si2c1_val mem[12'h1e9]=16'h1080 ; // pushi 0x0080 mem[12'h1ea]=16'hf005 ; // band mem[12'h1eb]=16'h61f3 ; // JNZ si2c1_a1 mem[12'h1ec]=16'h1000 ; // pushi 0x0000 mem[12'h1ed]=16'he000 ; // out mem[12'h1ee]=16'h1002 ; // pushi 0x0002 mem[12'h1ef]=16'he000 ; // out mem[12'h1f0]=16'h1000 ; // pushi 0x0000 mem[12'h1f1]=16'he000 ; // out mem[12'h1f2]=16'h41f9 ; // jmp si2c1_a2 mem[12'h1f3]=16'h1001 ; //si2c1_a1: pushi 0x0001 mem[12'h1f4]=16'he000 ; // out mem[12'h1f5]=16'h1003 ; // pushi 0x0003 mem[12'h1f6]=16'he000 ; // out mem[12'h1f7]=16'h1001 ; // pushi 0x0001 mem[12'h1f8]=16'he000 ; // out mem[12'h1f9]=16'h2205 ; //si2c1_a2: push si2c1_val mem[12'h1fa]=16'h1001 ; // pushi 1 mem[12'h1fb]=16'hf003 ; // shl mem[12'h1fc]=16'h3205 ; // pop si2c1_val mem[12'h1fd]=16'h2206 ; // push si2c1_i mem[12'h1fe]=16'h1001 ; // pushi 1 mem[12'h1ff]=16'hf001 ; // sub mem[12'h200]=16'h3206 ; // pop si2c1_i mem[12'h201]=16'h2206 ; // push si2c1_i mem[12'h202]=16'h61e8 ; // jnz si2c1_a3 mem[12'h203]=16'h4000 ; //si2c1_rtn: jmp 0x000 mem[12'h204]=16'h4000 ; //si2c1_jmp: 0x4000 mem[12'h205]=16'h0000 ; //si2c1_val: 0x0000 mem[12'h206]=16'h0000 ; //si2c1_i: 0x0000 mem[12'h207]=16'h2251 ; //ri2c1: PUSH ri2c1_jmp mem[12'h208]=16'hf006 ; // BOR mem[12'h209]=16'h324a ; // POP ri2c1_rtn mem[12'h20a]=16'h3252 ; // POP ri2c1_addr mem[12'h20b]=16'h3253 ; // pop ri2c1_reg mem[12'h20c]=16'h3254 ; // pop ri2c1_raddr mem[12'h20d]=16'h12d2 ; // PUSHI i2cStart mem[12'h20e]=16'h1210 ; // PUSHI ri2c1_a1 mem[12'h20f]=16'h42b2 ; // JMP SubI2C1 mem[12'h210]=16'h2252 ; //ri2c1_a1: push ri2c1_addr mem[12'h211]=16'h1001 ; // pushi 1 mem[12'h212]=16'hf003 ; // shl mem[12'h213]=16'h1215 ; // pushi ri2c1_a2 mem[12'h214]=16'h41e2 ; // jmp si2c1 mem[12'h215]=16'h12df ; //ri2c1_a2: PUSHI i2cRAck mem[12'h216]=16'h1218 ; // PUSHI ri2c1_a3 mem[12'h217]=16'h42b2 ; // JMP SubI2C1 mem[12'h218]=16'hd000 ; //ri2c1_a3: in mem[12'h219]=16'h1001 ; // pushi 0x01 mem[12'h21a]=16'hf005 ; // band mem[12'h21b]=16'h521e ; // jz ri2c1_a3_1 mem[12'h21c]=16'h1001 ; // pushi 1 mem[12'h21d]=16'h424b ; // jmp ri2c1_err mem[12'h21e]=16'h2253 ; //ri2c1_a3_1: push ri2c1_reg mem[12'h21f]=16'h1221 ; // pushi ri2c1_a4 mem[12'h220]=16'h41e2 ; // jmp si2c1 mem[12'h221]=16'h12df ; //ri2c1_a4: PUSHI i2cRAck mem[12'h222]=16'h1224 ; // PUSHI ri2c1_a5 mem[12'h223]=16'h42b2 ; // JMP SubI2C1 mem[12'h224]=16'hd000 ; //ri2c1_a5: in mem[12'h225]=16'h1001 ; // pushi 0x01 mem[12'h226]=16'hf005 ; // band mem[12'h227]=16'h522a ; // jz ri2c1_a5_1 mem[12'h228]=16'h1002 ; // pushi 2 mem[12'h229]=16'h424b ; // jmp ri2c1_err mem[12'h22a]=16'h12d2 ; //ri2c1_a5_1: PUSHI i2cStart mem[12'h22b]=16'h122d ; // PUSHI ri2c1_a6 mem[12'h22c]=16'h42b2 ; // JMP SubI2C1 mem[12'h22d]=16'h2252 ; //ri2c1_a6: push ri2c1_addr mem[12'h22e]=16'h1001 ; // pushi 1 mem[12'h22f]=16'hf003 ; // shl mem[12'h230]=16'h1001 ; // pushi 0x0001 mem[12'h231]=16'hf006 ; // BOR mem[12'h232]=16'h1234 ; // pushi ri2c1_a7 mem[12'h233]=16'h41e2 ; // jmp si2c1 mem[12'h234]=16'h12df ; //ri2c1_a7: PUSHI i2cRAck mem[12'h235]=16'h1237 ; // PUSHI ri2c1_a8 mem[12'h236]=16'h42b2 ; // JMP SubI2C1 mem[12'h237]=16'hd000 ; //ri2c1_a8: in mem[12'h238]=16'h1001 ; // pushi 0x01 mem[12'h239]=16'hf005 ; // band mem[12'h23a]=16'h523d ; // jz ri2c1_a8_1 mem[12'h23b]=16'h1003 ; // pushi 3 mem[12'h23c]=16'h424b ; // jmp ri2c1_err mem[12'h23d]=16'h12ef ; //ri2c1_a8_1: pushi i2cRead mem[12'h23e]=16'h1240 ; // pushi ri2c1_a9 mem[12'h23f]=16'h42b2 ; // jmp SubI2C1 mem[12'h240]=16'h2254 ; //ri2c1_a9: push ri2c1_raddr mem[12'h241]=16'hd000 ; // in mem[12'h242]=16'h8000 ; // st mem[12'h243]=16'h12e7 ; // PUSHI i2cNAck mem[12'h244]=16'h1246 ; // PUSHI ri2c1_a10 mem[12'h245]=16'h42b2 ; // JMP SubI2C1 mem[12'h246]=16'h12eb ; //ri2c1_a10: PUSHI i2cStop mem[12'h247]=16'h1249 ; // PUSHI ri2c1_a11 mem[12'h248]=16'h42b2 ; // JMP SubI2C1 mem[12'h249]=16'h1000 ; //ri2c1_a11: pushI 0 mem[12'h24a]=16'h4000 ; //ri2c1_rtn: jmp 0x000 mem[12'h24b]=16'h3255 ; //ri2c1_err: pop ri2c1_ercode mem[12'h24c]=16'h12eb ; // PUSHI i2cStop mem[12'h24d]=16'h124f ; // PUSHI ri2c1_a12 mem[12'h24e]=16'h42b2 ; // JMP SubI2C1 mem[12'h24f]=16'h2255 ; //ri2c1_a12: push ri2c1_ercode mem[12'h250]=16'h424a ; // jmp ri2c1_rtn mem[12'h251]=16'h4000 ; //ri2c1_jmp: 0x4000 mem[12'h252]=16'h0000 ; //ri2c1_addr: 0x0000 mem[12'h253]=16'h0000 ; //ri2c1_reg: 0x0000 mem[12'h254]=16'h0000 ; //ri2c1_raddr: 0x0000 mem[12'h255]=16'h0000 ; //ri2c1_ercode: 0x0000 mem[12'h256]=16'h22ac ; //ri2c2: PUSH ri2c2_jmp mem[12'h257]=16'hf006 ; // BOR mem[12'h258]=16'h32a5 ; // POP ri2c2_rtn mem[12'h259]=16'h32ad ; // POP ri2c2_addr mem[12'h25a]=16'h32ae ; // pop ri2c2_reg mem[12'h25b]=16'h32af ; // pop ri2c2_raddr mem[12'h25c]=16'h12d2 ; // PUSHI i2cStart mem[12'h25d]=16'h125f ; // PUSHI ri2c2_a1 mem[12'h25e]=16'h42b2 ; // JMP SubI2C1 mem[12'h25f]=16'h22ad ; //ri2c2_a1: push ri2c2_addr mem[12'h260]=16'h1001 ; // pushi 1 mem[12'h261]=16'hf003 ; // shl mem[12'h262]=16'h1264 ; // pushi ri2c2_a2 mem[12'h263]=16'h41e2 ; // jmp si2c1 mem[12'h264]=16'h12df ; //ri2c2_a2: PUSHI i2cRAck mem[12'h265]=16'h1267 ; // PUSHI ri2c2_a3 mem[12'h266]=16'h42b2 ; // JMP SubI2C1 mem[12'h267]=16'hd000 ; //ri2c2_a3: in mem[12'h268]=16'h1001 ; // pushi 0x01 mem[12'h269]=16'hf005 ; // band mem[12'h26a]=16'h526d ; // jz ri2c2_a3_1 mem[12'h26b]=16'h1001 ; // pushi 1 mem[12'h26c]=16'h42a6 ; // jmp ri2c2_err mem[12'h26d]=16'h22ae ; //ri2c2_a3_1: push ri2c2_reg mem[12'h26e]=16'h1270 ; // pushi ri2c2_a4 mem[12'h26f]=16'h41e2 ; // jmp si2c1 mem[12'h270]=16'h12df ; //ri2c2_a4: PUSHI i2cRAck mem[12'h271]=16'h1273 ; // PUSHI ri2c2_a5 mem[12'h272]=16'h42b2 ; // JMP SubI2C1 mem[12'h273]=16'hd000 ; //ri2c2_a5: in mem[12'h274]=16'h1001 ; // pushi 0x01 mem[12'h275]=16'hf005 ; // band mem[12'h276]=16'h5279 ; // jz ri2c2_a5_1 mem[12'h277]=16'h1002 ; // pushi 2 mem[12'h278]=16'h42a6 ; // jmp ri2c2_err mem[12'h279]=16'h12d2 ; //ri2c2_a5_1: PUSHI i2cStart mem[12'h27a]=16'h127c ; // PUSHI ri2c2_a6 mem[12'h27b]=16'h42b2 ; // JMP SubI2C1 mem[12'h27c]=16'h22ad ; //ri2c2_a6: push ri2c2_addr mem[12'h27d]=16'h1001 ; // pushi 1 mem[12'h27e]=16'hf003 ; // shl mem[12'h27f]=16'h1001 ; // pushi 0x0001 mem[12'h280]=16'hf006 ; // BOR mem[12'h281]=16'h1283 ; // pushi ri2c2_a7 mem[12'h282]=16'h41e2 ; // jmp si2c1 mem[12'h283]=16'h12df ; //ri2c2_a7: PUSHI i2cRAck mem[12'h284]=16'h1286 ; // PUSHI ri2c2_a8 mem[12'h285]=16'h42b2 ; // JMP SubI2C1 mem[12'h286]=16'hd000 ; //ri2c2_a8: in mem[12'h287]=16'h1001 ; // pushi 0x01 mem[12'h288]=16'hf005 ; // band mem[12'h289]=16'h528c ; // jz ri2c2_a8_1 mem[12'h28a]=16'h1003 ; // pushi 3 mem[12'h28b]=16'h42a6 ; // jmp ri2c2_err mem[12'h28c]=16'h12ef ; //ri2c2_a8_1: pushi i2cRead mem[12'h28d]=16'h128f ; // pushi ri2c2_l9 mem[12'h28e]=16'h42b2 ; // jmp SubI2C1 mem[12'h28f]=16'hd000 ; //ri2c2_l9: in mem[12'h290]=16'h1008 ; // pushi 8 mem[12'h291]=16'hf003 ; // shl mem[12'h292]=16'h32b0 ; // pop ri2c2_val1 mem[12'h293]=16'h12e3 ; // PUSHI i2cWAck mem[12'h294]=16'h1296 ; // PUSHI ri2c2_a10 mem[12'h295]=16'h42b2 ; // JMP SubI2C1 mem[12'h296]=16'h12ef ; //ri2c2_a10: pushi i2cRead mem[12'h297]=16'h1299 ; // pushi ri2c2_a11 mem[12'h298]=16'h42b2 ; // jmp SubI2C1 mem[12'h299]=16'h22af ; //ri2c2_a11: push ri2c2_raddr mem[12'h29a]=16'hd000 ; // in mem[12'h29b]=16'h22b0 ; // push ri2c2_val1 mem[12'h29c]=16'hf006 ; // bor mem[12'h29d]=16'h8000 ; // st mem[12'h29e]=16'h12e7 ; // PUSHI i2cNAck mem[12'h29f]=16'h12a1 ; // PUSHI ri2c2_a12 mem[12'h2a0]=16'h42b2 ; // JMP SubI2C1 mem[12'h2a1]=16'h12eb ; //ri2c2_a12: PUSHI i2cStop mem[12'h2a2]=16'h12a4 ; // PUSHI ri2c2_a13 mem[12'h2a3]=16'h42b2 ; // JMP SubI2C1 mem[12'h2a4]=16'h1000 ; //ri2c2_a13: pushI 0 mem[12'h2a5]=16'h4000 ; //ri2c2_rtn: jmp 0x000 mem[12'h2a6]=16'h32b1 ; //ri2c2_err: pop ri2c2_ercode mem[12'h2a7]=16'h12eb ; // PUSHI i2cStop mem[12'h2a8]=16'h12aa ; // PUSHI ri2c2_a14 mem[12'h2a9]=16'h42b2 ; // JMP SubI2C1 mem[12'h2aa]=16'h22b1 ; //ri2c2_a14: push ri2c2_ercode mem[12'h2ab]=16'h42a5 ; // jmp ri2c2_rtn mem[12'h2ac]=16'h4000 ; //ri2c2_jmp: 0x4000 mem[12'h2ad]=16'h0000 ; //ri2c2_addr: 0x0000 mem[12'h2ae]=16'h0000 ; //ri2c2_reg: 0x0000 mem[12'h2af]=16'h0000 ; //ri2c2_raddr: 0x0000 mem[12'h2b0]=16'h0000 ; //ri2c2_val1: 0x0000 mem[12'h2b1]=16'h0000 ; //ri2c2_ercode: 0x0000 mem[12'h2b2]=16'h22cd ; //SubI2C1: PUSH LblJMP mem[12'h2b3]=16'hf006 ; // BOR mem[12'h2b4]=16'h32cc ; // POP RtnSub1 mem[12'h2b5]=16'h32ce ; // POP Sub1Data2 mem[12'h2b6]=16'h22ce ; // PUSH Sub1Data2 mem[12'h2b7]=16'h7000 ; // LD mem[12'h2b8]=16'h32d1 ; // POP N mem[12'h2b9]=16'h22ce ; // PUSH Sub1Data2 mem[12'h2ba]=16'h1001 ; // PUSHI 1 mem[12'h2bb]=16'hf000 ; // ADD mem[12'h2bc]=16'h32cf ; // POP Sub1SA mem[12'h2bd]=16'h1000 ; // PUSHI 0 mem[12'h2be]=16'h32d0 ; // POP i mem[12'h2bf]=16'h22d0 ; //L1: PUSH i mem[12'h2c0]=16'h22cf ; // PUSH Sub1SA mem[12'h2c1]=16'hf000 ; // ADD mem[12'h2c2]=16'h7000 ; // LD mem[12'h2c3]=16'he000 ; // OUT mem[12'h2c4]=16'h22d0 ; // PUSH i mem[12'h2c5]=16'h1001 ; // PUSHI 1 mem[12'h2c6]=16'hf000 ; // ADD mem[12'h2c7]=16'h32d0 ; // POP i mem[12'h2c8]=16'h22d0 ; // PUSH i mem[12'h2c9]=16'h22d1 ; // PUSH N mem[12'h2ca]=16'hf001 ; // SUB mem[12'h2cb]=16'h62bf ; // JNZ L1 mem[12'h2cc]=16'h4000 ; //RtnSub1: JMP 0x000 mem[12'h2cd]=16'h4000 ; //LblJMP: 0x4000 mem[12'h2ce]=16'h0000 ; //Sub1Data2: 0x0000 mem[12'h2cf]=16'h0000 ; //Sub1SA: 0x0000 mem[12'h2d0]=16'h0000 ; //i: 0x0000 mem[12'h2d1]=16'h0000 ; //N: 0x0000 mem[12'h2d2]=16'h0003 ; //i2cStart: 3 mem[12'h2d3]=16'h0001 ; // 1 mem[12'h2d4]=16'h0003 ; // 3 mem[12'h2d5]=16'h0002 ; // 2 mem[12'h2d6]=16'h0000 ; // 0 mem[12'h2d7]=16'h0003 ; //i2cAddrW: 3 mem[12'h2d8]=16'h0000 ; // 0 mem[12'h2d9]=16'h0002 ; // 2 mem[12'h2da]=16'h0000 ; // 0 mem[12'h2db]=16'h0003 ; //i2cAddrR: 3 mem[12'h2dc]=16'h0001 ; // 1 mem[12'h2dd]=16'h0003 ; // 3 mem[12'h2de]=16'h0001 ; // 1 mem[12'h2df]=16'h0003 ; //i2cRAck: 3 mem[12'h2e0]=16'h0001 ; // 1 mem[12'h2e1]=16'h0003 ; // 3 mem[12'h2e2]=16'h0001 ; // 1 mem[12'h2e3]=16'h0003 ; //i2cWAck: 3 mem[12'h2e4]=16'h0000 ; // 0 mem[12'h2e5]=16'h0002 ; // 2 mem[12'h2e6]=16'h0000 ; // 0 mem[12'h2e7]=16'h0003 ; //i2cNAck: 3 mem[12'h2e8]=16'h0001 ; // 1 mem[12'h2e9]=16'h0003 ; // 3 mem[12'h2ea]=16'h0001 ; // 1 mem[12'h2eb]=16'h0003 ; //i2cStop: 3 mem[12'h2ec]=16'h0002 ; // 2 mem[12'h2ed]=16'h0003 ; // 3 mem[12'h2ee]=16'h0003 ; // 3 mem[12'h2ef]=16'h0011 ; //i2cRead: 0x0011 mem[12'h2f0]=16'h0001 ; // 1 mem[12'h2f1]=16'h0003 ; // 3 mem[12'h2f2]=16'h0001 ; // 1 mem[12'h2f3]=16'h0003 ; // 3 mem[12'h2f4]=16'h0001 ; // 1 mem[12'h2f5]=16'h0003 ; // 3 mem[12'h2f6]=16'h0001 ; // 1 mem[12'h2f7]=16'h0003 ; // 3 mem[12'h2f8]=16'h0001 ; // 1 mem[12'h2f9]=16'h0003 ; // 3 mem[12'h2fa]=16'h0001 ; // 1 mem[12'h2fb]=16'h0003 ; // 3 mem[12'h2fc]=16'h0001 ; // 1 mem[12'h2fd]=16'h0003 ; // 3 mem[12'h2fe]=16'h0001 ; // 1 mem[12'h2ff]=16'h0003 ; // 3 mem[12'h300]=16'h0001 ; // 1
