[[FpgaI2c]] * miniCPUによるI2C光センサの制御 [#ld633006] - 温度センサの回路と miniCPU のプログラムをちょっと書き換えて、I2C光センサを制御してみます。 - 光センサにはこれを使います。 -- https://www.switch-science.com/catalog/1174/ - 温度センサのときのtop.xdc (vivadoの場合) または top.ucf (ISEの場合) をちょっと書き換えて、 scl, sda を、nexys4 も pmod コネクタの JCの1,2 に割り当てます。 -- &ref(光センサ/pmod-jc.jpg,75%); - ボード外部に回路を作成し、それをNexys4に接続するとき、電源を入れる前に、必ずテスターで、ショートがないことを確認してください。 -- &ref(光センサ/jc-lightsensor-1.jpg,50%); &ref(光センサ/jc-lightsensor-2.jpg,50%); - 分周比は 011000 の前後で試してみてください。 - プログラム実行後, 定期的に7セグメントLED表示の下2桁に, 計測した光の強さが表示されます。センサを手で覆ったり、強い光を当てたりして、動作の確認をしてみてください。 * 回路[#zabbfe7f] - top.v module top(sSegAnode, sSegCathode, sw, ledOut, colorLed_1, colorLed_2, bu, bd, bl, br, bc, scl, sda, // jc, bclck ); output [7:0] sSegAnode; output [7:0] sSegCathode; output [15:0] ledOut; // led[8] ... if sda is sending, corresponding to the last sended sda, else corresponding to the last received sda // it is shifted to left when a positive edge of scl is detected. // led[0] corresponding to sw[0] // led[1] corresponding to sw[1] // led[2] corresponsing to center button, bc. output [2:0] colorLed_1; output [2:0] colorLed_2; // color LED // output [7:0] jc; wire [7:0] jc; input [15:0] sw; // sw[15:8] ... for setting sda send data, sw[7:0] ... for controlling // sw[0] ... if 1 scl is not ready, else scl is ready. // sw[1] ... if 1 sda is receiving(1), else sda is sending(0). // sw[2] ... sending sda. input bu, bd, bl, br, bc, bclck; // bd corresponding to !reset. // bc corresponding to scl. scl=sw[0]|bc // if posedge bl is detected, sw is shown in hex in the 7seg led array. inout scl, sda; reg sclx, sdax; reg [3:0] jcx; assign scl=(~sclx)?1'b0:1'bz; assign sda=(~sdax)?1'b0:1'bz; assign jc[7:4]=jcx; wire BNx, BWx, BEx, BCx; // reset: BSx // BWx, BEx ... change operationMode // wire [15:0] swx; wire reset; // reg sclRw, sdaRw; // write=1, read=0; wire cpuClk; wire cpuRun; reg [7:0] data; reg [2:0] operationMode; // operationMode: 0 ... manual operation of peripherals // 1 ... CPU independent // 2 ... CPU, I2C connected reg [15:0] ledWire,cpuIn; wire [2:0] cpuCs; wire [11:0] pcout,abus; wire [15:0] irout,qtop,dbus,out; reg [31:0] sSegArray; reg [15:0] led; wire start; wire haltIn; wire halt; wire [15:0] sSegBufL; wire [15:0] sSegBufH; reg [4:0] divide; wire dclk; initial begin divide={01101}; end assign ledOut=led; reg [2:0] colorLed_1x; wire [2:0] colorLed_2x; // assign colorLed_1=colorLed_1x; assign colorLed_2=colorLed_2x; assign reset=~bd; always @(posedge sclx, negedge reset) begin if(!reset) begin data<=0; end else data<={data[6:0],sda}; end // for operation mode always @(posedge BEx or negedge reset ) begin if(!reset) begin operationMode<=3'b000; end else case (operationMode) 3'b000: operationMode<=3'b001; 3'b001: operationMode<=3'b010; 3'b010: operationMode<=3'b011; 3'b011: operationMode<=3'b100; 3'b100: operationMode<=3'b101; 3'b101: operationMode<=3'b110; 3'b110: operationMode<=3'b000; default operationMode<=3'b000; endcase end /* always @(posedge BWx or negedge reset ) begin if(!reset) begin operationMode<=0; end else case (operationMode) 3'b000: operationMode<=3'b110; 3'b001: operationMode<=3'b000; 3'b010: operationMode<=3'b001; 3'b011: operationMode<=3'b010; 3'b100: operationMode<=3'b011; 3'b101: operationMode<=3'b100; 3'b110: operationMode<=3'b101; default operationMode<=3'b000; endcase end */ /* */ // assign setDivide=(operationMode==3'b011)?BCx:1'b0; always @(posedge BCx ) begin if(operationMode==3'b011) begin divide<=swx[15:11]; end end assign colorLed_2x={dclk,scl,sda}; assign start=(operationMode==3'b100|operationMode==3'b101)?BCx:1'b0; assign cpuClk=(operationMode==3'b100|operationMode==3'b101)? dclk:BCx; assign cpuRun=(operationMode==3'b100|operationMode==3'b101)? ssRun:BNx; assign haltIn=(operationMode==3'b100|operationMode==3'b101)? halt:1'b0; assign sSegBufL=BWx?irout:out; assign sSegBufH=BWx?{{0},cpuCs,abus}:pcout; // always @(operationMode or swx[0] or BCx or data or BNx or cpuCs or out or sda or scl or out[0] or out[1]) begin // always @(posedge BEx or posedge BWx or negedge reset) begin always @(operationMode) begin case(operationMode) 3'b000: begin // direct i2c operation only colorLed_1x=3'b000; cpuIn=0; sSegArray={{16{0}},data,swx[7:0]}; led[15:8]=data; led[7:0]=swx[7:0]; sclx=BCx; sdax=swx[0]; jcx=swx[5:2]; end 3'b001: begin // mini CPU, with manual clock only ... for start ... push BTN, keep, push BTC, release BTN, BTC colorLed_1x=3'b001; // blue cpuIn=swx; sSegArray={sSegBufH,sSegBufL}; led=out; sclx=1'b1; sdax=1'b1; jcx={0,0,0,0}; end 3'b010: begin // mini CPU, with manual clock, with i2c IO colorLed_1x=3'b010; //green cpuIn={swx[15:8],data}; sSegArray={sSegBufH, sSegBufL}; led[15:8]=data; led[7:0]=out[7:0]; sclx=out[1]; sdax=out[0]; jcx=out[5:2]; end 3'b011: begin // set clock divider for mini CPU with automatic clock colorLed_1x=3'b011; // cyan .. aqua cpuIn=0; sSegArray={divide,{13{0}},data,swx[7:0]}; led[15:8]=divide; led[7:0]=swx[7:0]; sclx=1; sdax=1; jcx={0,0,0,0}; end 3'b100: begin // mini CPU, only, with automatic clock, colorLed_1x=3'b100; // red cpuIn=swx; sSegArray={sSegBufH, sSegBufL}; led=out; sclx=1'b1; sdax=1'b1; jcx={0,0,0,0}; end 3'b101: begin // mini CPU, with automatic clock, with i2c IO colorLed_1x=3'b101; // purple cpuIn={swx[15:8],data}; sSegArray={sSegBufH, sSegBufL}; led[15:8]=data; led[7:0]=out[7:0]; sclx=out[1]; sdax=out[0]; jcx=out[5:2]; end default begin colorLed_1x=3'b000; cpuIn=swx; sSegArray={{0{16}},data,swx[7:0]}; led[15:8]=data; led[7:0]=swx[7:0]; sclx=BCx; sdax=swx[0]; jcx=swx[5:2]; end endcase end chattering #(20) chattering0(.clk(bclck), .reset(reset), .in({bu,bl,br,bc,sw}), .out({BNx, BWx, BEx, BCx,swx})); /* for test bench assign BNx=bu; assign BWx=bl; assign BEx=br; assign BCx=bc; assign swx=sw; */ sSegArray sSegArray0(.clk(bclck), .reset(reset), .load(1'b1), .d(sSegArray), .anode(sSegAnode), .cathode(sSegCathode)); minicpu minicpu0(.clk(cpuClk), .reset(reset), .run(cpuRun), .in(cpuIn), .cs(cpuCs), .pcout(pcout), .irout(irout), .qtop(qtop), .abus(abus), .dbus(dbus), .out(out), .haltx(haltIn)); clockDivider clockDivider0(.clk(bclck),.reset(reset), .div(divide), .dclk(dclk)); cpuStartStopSequence cpuStartStopSequence0(.clk(dclk), .reset(reset), .start(start), .run(ssRun), .halt(halt)); endmodule - chattering.v, sSegArray.v, clockDivider.v cpuStopStartSequence.v は、[[MiniCPU簡易OS]]のものをコピペして使ってください。 - top.xdc (for Vivado) ## Clock signal ##Bank = 35, Pin name = IO_L12P_T1_MRCC_35, Sch name = CLK100MHZ set_property PACKAGE_PIN E3 [get_ports bclck] set_property IOSTANDARD LVCMOS33 [get_ports bclck] # create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports bclk] ## Switches ##Bank = 34, Pin name = IO_L21P_T3_DQS_34, Sch name = SW0 set_property PACKAGE_PIN U9 [get_ports {sw[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}] ##Bank = 34, Pin name = IO_25_34, Sch name = SW1 set_property PACKAGE_PIN U8 [get_ports {sw[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}] ##Bank = 34, Pin name = IO_L23P_T3_34, Sch name = SW2 set_property PACKAGE_PIN R7 [get_ports {sw[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[2]}] ##Bank = 34, Pin name = IO_L19P_T3_34, Sch name = SW3 set_property PACKAGE_PIN R6 [get_ports {sw[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[3]}] ##Bank = 34, Pin name = IO_L19N_T3_VREF_34, Sch name = SW4 set_property PACKAGE_PIN R5 [get_ports {sw[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[4]}] ##Bank = 34, Pin name = IO_L20P_T3_34, Sch name = SW5 set_property PACKAGE_PIN V7 [get_ports {sw[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[5]}] ##Bank = 34, Pin name = IO_L20N_T3_34, Sch name = SW6 set_property PACKAGE_PIN V6 [get_ports {sw[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[6]}] ##Bank = 34, Pin name = IO_L10P_T1_34, Sch name = SW7 set_property PACKAGE_PIN V5 [get_ports {sw[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[7]}] ##Bank = 34, Pin name = IO_L8P_T1-34, Sch name = SW8 set_property PACKAGE_PIN U4 [get_ports {sw[8]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[8]}] ##Bank = 34, Pin name = IO_L9N_T1_DQS_34, Sch name = SW9 set_property PACKAGE_PIN V2 [get_ports {sw[9]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[9]}] ##Bank = 34, Pin name = IO_L9P_T1_DQS_34, Sch name = SW10 set_property PACKAGE_PIN U2 [get_ports {sw[10]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[10]}] ##Bank = 34, Pin name = IO_L11N_T1_MRCC_34, Sch name = SW11 set_property PACKAGE_PIN T3 [get_ports {sw[11]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[11]}] ##Bank = 34, Pin name = IO_L17N_T2_34, Sch name = SW12 set_property PACKAGE_PIN T1 [get_ports {sw[12]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[12]}] ##Bank = 34, Pin name = IO_L11P_T1_SRCC_34, Sch name = SW13 set_property PACKAGE_PIN R3 [get_ports {sw[13]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[13]}] ##Bank = 34, Pin name = IO_L14N_T2_SRCC_34, Sch name = SW14 set_property PACKAGE_PIN P3 [get_ports {sw[14]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[14]}] ##Bank = 34, Pin name = IO_L14P_T2_SRCC_34, Sch name = SW15 set_property PACKAGE_PIN P4 [get_ports {sw[15]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[15]}] ## LEDs ##Bank = 34, Pin name = IO_L24N_T3_34, Sch name = LED0 set_property PACKAGE_PIN T8 [get_ports {ledOut[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[0]}] ##Bank = 34, Pin name = IO_L21N_T3_DQS_34, Sch name = LED1 set_property PACKAGE_PIN V9 [get_ports {ledOut[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[1]}] ##Bank = 34, Pin name = IO_L24P_T3_34, Sch name = LED2 set_property PACKAGE_PIN R8 [get_ports {ledOut[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[2]}] ##Bank = 34, Pin name = IO_L23N_T3_34, Sch name = LED3 set_property PACKAGE_PIN T6 [get_ports {ledOut[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[3]}] ##Bank = 34, Pin name = IO_L12P_T1_MRCC_34, Sch name = LED4 set_property PACKAGE_PIN T5 [get_ports {ledOut[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[4]}] ##Bank = 34, Pin name = IO_L12N_T1_MRCC_34, Sch name = LED5 set_property PACKAGE_PIN T4 [get_ports {ledOut[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[5]}] ##Bank = 34, Pin name = IO_L22P_T3_34, Sch name = LED6 set_property PACKAGE_PIN U7 [get_ports {ledOut[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[6]}] ##Bank = 34, Pin name = IO_L22N_T3_34, Sch name = LED7 set_property PACKAGE_PIN U6 [get_ports {ledOut[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[7]}] ##Bank = 34, Pin name = IO_L10N_T1_34, Sch name = LED8 set_property PACKAGE_PIN V4 [get_ports {ledOut[8]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[8]}] ##Bank = 34, Pin name = IO_L8N_T1_34, Sch name = LED9 set_property PACKAGE_PIN U3 [get_ports {ledOut[9]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[9]}] ##Bank = 34, Pin name = IO_L7N_T1_34, Sch name = LED10 set_property PACKAGE_PIN V1 [get_ports {ledOut[10]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[10]}] ##Bank = 34, Pin name = IO_L17P_T2_34, Sch name = LED11 set_property PACKAGE_PIN R1 [get_ports {ledOut[11]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[11]}] ##Bank = 34, Pin name = IO_L13N_T2_MRCC_34, Sch name = LED12 set_property PACKAGE_PIN P5 [get_ports {ledOut[12]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[12]}] ##Bank = 34, Pin name = IO_L7P_T1_34, Sch name = LED13 set_property PACKAGE_PIN U1 [get_ports {ledOut[13]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[13]}] ##Bank = 34, Pin name = IO_L15N_T2_DQS_34, Sch name = LED14 set_property PACKAGE_PIN R2 [get_ports {ledOut[14]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[14]}] ##Bank = 34, Pin name = IO_L15P_T2_DQS_34, Sch name = LED15 set_property PACKAGE_PIN P2 [get_ports {ledOut[15]}] set_property IOSTANDARD LVCMOS33 [get_ports {ledOut[15]}] ##Bank = 34, Pin name = IO_L5P_T0_34, Sch name = LED16_R set_property PACKAGE_PIN K5 [get_ports {colorLed_1[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {colorLed_1[2]}] ##Bank = 15, Pin name = IO_L5P_T0_AD9P_15, Sch name = LED16_G set_property PACKAGE_PIN F13 [get_ports {colorLed_1[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {colorLed_1[1]}] ##Bank = 35, Pin name = IO_L19N_T3_VREF_35, Sch name = LED16_B set_property PACKAGE_PIN F6 [get_ports {colorLed_1[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {colorLed_1[0]}] ##Bank = 34, Pin name = IO_0_34, Sch name = LED17_R set_property PACKAGE_PIN K6 [get_ports {colorLed_2[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {colorLed_2[2]}] ##Bank = 35, Pin name = IO_24P_T3_35, Sch name = LED17_G set_property PACKAGE_PIN H6 [get_ports {colorLed_2[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {colorLed_2[1]}] ##Bank = CONFIG, Pin name = IO_L3N_T0_DQS_EMCCLK_14, Sch name = LED17_B set_property PACKAGE_PIN L16 [get_ports {colorLed_2[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {colorLed_2[0]}] ##7 segment display ##Bank = 34, Pin name = IO_L2N_T0_34, Sch name = CA set_property PACKAGE_PIN L3 [get_ports {sSegCathode[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[7]}] ##Bank = 34, Pin name = IO_L3N_T0_DQS_34, Sch name = CB set_property PACKAGE_PIN N1 [get_ports {sSegCathode[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[6]}] ##Bank = 34, Pin name = IO_L6N_T0_VREF_34, Sch name = CC set_property PACKAGE_PIN L5 [get_ports {sSegCathode[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[5]}] ##Bank = 34, Pin name = IO_L5N_T0_34, Sch name = CD set_property PACKAGE_PIN L4 [get_ports {sSegCathode[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[4]}] ##Bank = 34, Pin name = IO_L2P_T0_34, Sch name = CE set_property PACKAGE_PIN K3 [get_ports {sSegCathode[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[3]}] ##Bank = 34, Pin name = IO_L4N_T0_34, Sch name = CF set_property PACKAGE_PIN M2 [get_ports {sSegCathode[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[2]}] ##Bank = 34, Pin name = IO_L6P_T0_34, Sch name = CG set_property PACKAGE_PIN L6 [get_ports {sSegCathode[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegCathode[1]}] ##Bank = 34, Pin name = IO_L16P_T2_34, Sch name = DP set_property PACKAGE_PIN M4 [get_ports sSegCathode[0]] set_property IOSTANDARD LVCMOS33 [get_ports sSegCathode[0]] ##Bank = 34, Pin name = IO_L18N_T2_34, Sch name = AN0 set_property PACKAGE_PIN N6 [get_ports {sSegAnode[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[0]}] ##Bank = 34, Pin name = IO_L18P_T2_34, Sch name = AN1 set_property PACKAGE_PIN M6 [get_ports {sSegAnode[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[1]}] ##Bank = 34, Pin name = IO_L4P_T0_34, Sch name = AN2 set_property PACKAGE_PIN M3 [get_ports {sSegAnode[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[2]}] ##Bank = 34, Pin name = IO_L13_T2_MRCC_34, Sch name = AN3 set_property PACKAGE_PIN N5 [get_ports {sSegAnode[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[3]}] ##Bank = 34, Pin name = IO_L3P_T0_DQS_34, Sch name = AN4 set_property PACKAGE_PIN N2 [get_ports {sSegAnode[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[4]}] ##Bank = 34, Pin name = IO_L16N_T2_34, Sch name = AN5 set_property PACKAGE_PIN N4 [get_ports {sSegAnode[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[5]}] ##Bank = 34, Pin name = IO_L1P_T0_34, Sch name = AN6 set_property PACKAGE_PIN L1 [get_ports {sSegAnode[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[6]}] ##Bank = 34, Pin name = IO_L1N_T034, Sch name = AN7 set_property PACKAGE_PIN M1 [get_ports {sSegAnode[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {sSegAnode[7]}] ##Buttons ##Bank = 15, Pin name = IO_L3P_T0_DQS_AD1P_15, Sch name = CPU_RESET #set_property PACKAGE_PIN C12 [get_ports btnCpuReset] #set_property IOSTANDARD LVCMOS33 [get_ports btnCpuReset] ##Bank = 15, Pin name = IO_L11N_T1_SRCC_15, Sch name = BTNC set_property PACKAGE_PIN E16 [get_ports bc] set_property IOSTANDARD LVCMOS33 [get_ports bc] ##Bank = 15, Pin name = IO_L14P_T2_SRCC_15, Sch name = BTNU set_property PACKAGE_PIN F15 [get_ports bu] set_property IOSTANDARD LVCMOS33 [get_ports bu] ##Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14, Sch name = BTNL set_property PACKAGE_PIN T16 [get_ports bl] set_property IOSTANDARD LVCMOS33 [get_ports bl] ##Bank = 14, Pin name = IO_25_14, Sch name = BTNR set_property PACKAGE_PIN R10 [get_ports br] set_property IOSTANDARD LVCMOS33 [get_ports br] ##Bank = 14, Pin name = IO_L21P_T3_DQS_14, Sch name = BTND set_property PACKAGE_PIN V10 [get_ports bd] set_property IOSTANDARD LVCMOS33 [get_ports bd] ##Temperature Sensor ##Bank = 15, Pin name = IO_L14N_T2_SRCC_15, Sch name = TMP_SCL #set_property PACKAGE_PIN F16 [get_ports scl] # set_property IOSTANDARD LVCMOS33 [get_ports scl] ##Bank = 15, Pin name = IO_L13N_T2_MRCC_15, Sch name = TMP_SDA #set_property PACKAGE_PIN G16 [get_ports sda] # set_property IOSTANDARD LVCMOS33 [get_ports sda] ##Bank = 15, Pin name = IO_L1P_T0_AD0P_15, Sch name = TMP_INT #set_property PACKAGE_PIN D14 [get_ports tmpInt] #set_property IOSTANDARD LVCMOS33 [get_ports tmpInt] ##Bank = 15, Pin name = IO_L1N_T0_AD0N_15, Sch name = TMP_CT #set_property PACKAGE_PIN C14 [get_ports tmpCT] #set_property IOSTANDARD LVCMOS33 [get_ports tmpCT] ##Pmod Header JC ##Bank = 35, Pin name = IO_L23P_T3_35, Sch name = JC1 #set_property PACKAGE_PIN K2 [get_ports {jc[0]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[0]}] set_property PACKAGE_PIN K2 [get_ports scl] set_property IOSTANDARD LVCMOS33 [get_ports scl] ##Bank = 35, Pin name = IO_L6P_T0_35, Sch name = JC2 #set_property PACKAGE_PIN E7 [get_ports {jc[1]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[1]}] set_property PACKAGE_PIN E7 [get_ports sda] set_property IOSTANDARD LVCMOS33 [get_ports sda] ##Bank = 35, Pin name = IO_L22P_T3_35, Sch name = JC3 set_property PACKAGE_PIN J3 [get_ports {jc[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {jc[2]}] #set_property PACKAGE_PIN J3 [get_ports {jc[2]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[2]}] ##Bank = 35, Pin name = IO_L21P_T3_DQS_35, Sch name = JC4 set_property PACKAGE_PIN J4 [get_ports {jc[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {jc[3]}] #set_property PACKAGE_PIN J4 [get_ports {jc[3]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[3]}] ##Bank = 35, Pin name = IO_L23N_T3_35, Sch name = JC7 set_property PACKAGE_PIN K1 [get_ports {jc[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {jc[4]}] #set_property PACKAGE_PIN K1 [get_ports {jc[4]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[4]}] ##Bank = 35, Pin name = IO_L5P_T0_AD13P_35, Sch name = JC8 set_property PACKAGE_PIN E6 [get_ports {jc[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {jc[5]}] #set_property PACKAGE_PIN E6 [get_ports {jc[5]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[5]}] ##Bank = 35, Pin name = IO_L22N_T3_35, Sch name = JC9 set_property PACKAGE_PIN J2 [get_ports {jc[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {jc[6]}] #set_property PACKAGE_PIN J2 [get_ports {jc[6]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[6]}] ##Bank = 35, Pin name = IO_L19P_T3_35, Sch name = JC10 set_property PACKAGE_PIN G6 [get_ports {jc[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {jc[7]}] #set_property PACKAGE_PIN G6 [get_ports {jc[7]}] # set_property IOSTANDARD LVCMOS33 [get_ports {jc[7]}] - top.ucf (ISEの場合) ## This file is a general .ucf for the Nexys4 rev B board ## To use it in a project: ## - uncomment the lines corresponding to used pins ## - rename the used signals according to the project ## Clock signal NET "bclck" LOC = "E3" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L12P_T1_MRCC_35, Sch name = CLK100MHZ #NET "clk" TNM_NET = sys_clk_pin; #TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 100 MHz HIGH 50%; ## Switches NET "sw<0>" LOC = "U9" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L21P_T3_DQS_34, Sch name = SW0 NET "sw<1>" LOC = "U8" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_25_34, Sch name = SW1 NET "sw<2>" LOC = "R7" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L23P_T3_34, Sch name = SW2 NET "sw<3>" LOC = "R6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L19P_T3_34, Sch name = SW3 NET "sw<4>" LOC = "R5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L19N_T3_VREF_34, Sch name = SW4 NET "sw<5>" LOC = "V7" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L20P_T3_34, Sch name = SW5 NET "sw<6>" LOC = "V6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L20N_T3_34, Sch name = SW6 NET "sw<7>" LOC = "V5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L10P_T1_34, Sch name = SW7 NET "sw<8>" LOC = "U4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L8P_T1-34, Sch name = SW8 NET "sw<9>" LOC = "V2" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L9N_T1_DQS_34, Sch name = SW9 NET "sw<10>" LOC = "U2" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L9P_T1_DQS_34, Sch name = SW10 NET "sw<11>" LOC = "T3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L11N_T1_MRCC_34, Sch name = SW11 NET "sw<12>" LOC = "T1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L17N_T2_34, Sch name = SW12 NET "sw<13>" LOC = "R3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L11P_T1_SRCC_34, Sch name = SW13 NET "sw<14>" LOC = "P3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L14N_T2_SRCC_34, Sch name = SW14 NET "sw<15>" LOC = "P4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L14P_T2_SRCC_34, Sch name = SW15 ## LEDs NET "ledOut<0>" LOC = "T8" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L24N_T3_34, Sch name = LED0 NET "ledOut<1>" LOC = "V9" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L21N_T3_DQS_34, Sch name = LED1 NET "ledOut<2>" LOC = "R8" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L24P_T3_34, Sch name = LED2 NET "ledOut<3>" LOC = "T6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L23N_T3_34, Sch name = LED3 NET "ledOut<4>" LOC = "T5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L12P_T1_MRCC_34, Sch name = LED4 NET "ledOut<5>" LOC = "T4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L12N_T1_MRCC_34, Sch name = LED5 NET "ledOut<6>" LOC = "U7" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L22P_T3_34, Sch name = LED6 NET "ledOut<7>" LOC = "U6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L22N_T3_34, Sch name = LED7 NET "ledOut<8>" LOC = "V4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L10N_T1_34, Sch name = LED8 NET "ledOut<9>" LOC = "U3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L8N_T1_34, Sch name = LED9 NET "ledOut<10>" LOC = "V1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L7N_T1_34, Sch name = LED10 NET "ledOut<11>" LOC = "R1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L17P_T2_34, Sch name = LED11 NET "ledOut<12>" LOC = "P5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L13N_T2_MRCC_34, Sch name = LED12 NET "ledOut<13>" LOC = "U1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L7P_T1_34, Sch name = LED13 NET "ledOut<14>" LOC = "R2" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L15N_T2_DQS_34, Sch name = LED14 NET "ledOut<15>" LOC = "P2" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L15P_T2_DQS_34, Sch name = LED15 NET "colorLed_1<2>" LOC = "K5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L5P_T0_34, Sch name = LED16_R NET "colorLed_1<1>" LOC = "F13" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L5P_T0_AD9P_15, Sch name = LED16_G NET "colorLed_1<0>" LOC = "F6" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L19N_T3_VREF_35, Sch name = LED16_B NET "colorLed_2<2>" LOC = "K6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_0_34, Sch name = LED17_R NET "colorLed_2<1>" LOC = "H6" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_24P_T3_35, Sch name = LED17_G NET "colorLed_2<0>" LOC = "L16" | IOSTANDARD = "LVCMOS33"; #Bank = CONFIG, Pin name = IO_L3N_T0_DQS_EMCCLK_14, Sch name = LED17_B ## 7 segment display NET "sSegCathode<7>" LOC = "L3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L2N_T0_34, Sch name = CA NET "sSegCathode<6>" LOC = "N1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L3N_T0_DQS_34, Sch name = CB NET "sSegCathode<5>" LOC = "L5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L6N_T0_VREF_34, Sch name = CC NET "sSegCathode<4>" LOC = "L4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L5N_T0_34, Sch name = CD NET "sSegCathode<3>" LOC = "K3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L2P_T0_34, Sch name = CE NET "sSegCathode<2>" LOC = "M2" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L4N_T0_34, Sch name = CF NET "sSegCathode<1>" LOC = "L6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L6P_T0_34, Sch name = CG NET "sSegCathode<0>" LOC = "M4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L16P_T2_34, Sch name = DP NET "sSegAnode<0>" LOC = "N6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L18N_T2_34, Sch name = AN0 NET "sSegAnode<1>" LOC = "M6" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L18P_T2_34, Sch name = AN1 NET "sSegAnode<2>" LOC = "M3" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L4P_T0_34, Sch name = AN2 NET "sSegAnode<3>" LOC = "N5" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L13_T2_MRCC_34, Sch name = AN3 NET "sSegAnode<4>" LOC = "N2" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L3P_T0_DQS_34, Sch name = AN4 NET "sSegAnode<5>" LOC = "N4" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L16N_T2_34, Sch name = AN5 NET "sSegAnode<6>" LOC = "L1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L1P_T0_34, Sch name = AN6 NET "sSegAnode<7>" LOC = "M1" | IOSTANDARD = "LVCMOS33"; #Bank = 34, Pin name = IO_L1N_T034, Sch name = AN7 ## Buttons #NET "btnCpuReset" LOC = "C12" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L3P_T0_DQS_AD1P_15, Sch name = CPU_RESET NET "bc" LOC = "E16" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L11N_T1_SRCC_15, Sch name = BTNC NET "bu" LOC = "F15" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L14P_T2_SRCC_15, Sch name = BTNU NET "bl" LOC = "T16" | IOSTANDARD = "LVCMOS33"; #Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14, Sch name = BTNL NET "br" LOC = "R10" | IOSTANDARD = "LVCMOS33"; #Bank = 14, Pin name = IO_25_14, Sch name = BTNR NET "bd" LOC = "V10" | IOSTANDARD = "LVCMOS33"; #Bank = 14, Pin name = IO_L21P_T3_DQS_14, Sch name = BTND ## Pmod Header JA #NET "JA<0>" LOC = "B13" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L1N_T0_AD0N_15, Sch name = JA1 #NET "JA<1>" LOC = "F14" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L5N_T0_AD9N_15, Sch name = JA2 #NET "JA<2>" LOC = "D17" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L16N_T2_A27_15, Sch name = JA3 #NET "JA<3>" LOC = "E17" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L16P_T2_A28_15, Sch name = JA4 #NET "JA<4>" LOC = "G13" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_0_15, Sch name = JA7 #NET "JA<5>" LOC = "C17" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L20N_T3_A19_15, Sch name = JA8 #NET "JA<6>" LOC = "D18" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L21N_T3_A17_15, Sch name = JA9 #NET "JA<7>" LOC = "E18" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L21P_T3_DQS_15, Sch name = JA10 ## Pmod Header JB #NET "JB<0>" LOC = "G14" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L15N_T2_DQS_ADV_B_15, Sch name = JB1 #NET "JB<1>" LOC = "P15" | IOSTANDARD = "LVCMOS33"; #Bank = 14, Pin name = IO_L13P_T2_MRCC_14, Sch name = JB2 #NET "JB<2>" LOC = "V11" | IOSTANDARD = "LVCMOS33"; #Bank = 14, Pin name = IO_L21N_T3_DQS_A06_D22_14, Sch name = JB3 #NET "JB<3>" LOC = "V15" | IOSTANDARD = "LVCMOS33"; #Bank = CONFIG, Pin name = IO_L16P_T2_CSI_B_14, Sch name = JB4 #NET "JB<4>" LOC = "K16" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_25_15, Sch name = JB7 #NET "JB<5>" LOC = "R16" | IOSTANDARD = "LVCMOS33"; #Bank = CONFIG, Pin name = IO_L15P_T2_DQS_RWR_B_14, Sch name = JB8 #NET "JB<6>" LOC = "T9" | IOSTANDARD = "LVCMOS33"; #Bank = 14, Pin name = IO_L24P_T3_A01_D17_14, Sch name = JB9 #NET "JB<7>" LOC = "U11" | IOSTANDARD = "LVCMOS33"; #Bank = 14, Pin name = IO_L19N_T3_A09_D25_VREF_14, Sch name = JB10 ## Pmod Header JC #NET "JC<0>" LOC = "K2" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L23P_T3_35, Sch name = JC1 #NET "JC<1>" LOC = "E7" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L6P_T0_35, Sch name = JC2 #NET "JC<2>" LOC = "J3" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L22P_T3_35, Sch name = JC3 #NET "JC<3>" LOC = "J4" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L21P_T3_DQS_35, Sch name = JC4 #NET "JC<4>" LOC = "K1" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L23N_T3_35, Sch name = JC7 #NET "JC<5>" LOC = "E6" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L5P_T0_AD13P_35, Sch name = JC8 #NET "JC<6>" LOC = "J2" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L22N_T3_35, Sch name = JC9 #NET "JC<7>" LOC = "G6" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L19P_T3_35, Sch name = JC10 NET "scl" LOC = "K2" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L14N_T2_SRCC_15, Sch name = TMP_SCL NET "sda" LOC = "E7" | IOSTANDARD = "LVCMOS33"; #Bank = 15, Pin name = IO_L13N_T2_MRCC_15, Sch name = TMP_SDA NET "jc<4>" LOC = "K1" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L23N_T3_35, Sch name = JC7 NET "jc<5>" LOC = "E6" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L5P_T0_AD13P_35, Sch name = JC8 NET "jc<6>" LOC = "J2" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L22N_T3_35, Sch name = JC9 NET "jc<7>" LOC = "G6" | IOSTANDARD = "LVCMOS33"; #Bank = 35, Pin name = IO_L19P_T3_35, Sch name = JC10 * miniCPUのプログラム [#k50c7a73] - miniCPU.vは、[[minicpu-v-for-os-i2c-jc]]を使ってください。 - ram.v を以下のように書き換えます。 - サブルーチンの説明 -- getLight ... i2c 光センサから照度を取り出します。 --- 引数1 (最初に push): 計測した照度を格納する番地 --- 引数2 (2番目に push): 戻り番地 --- return 時の stack の top ... return code, 0なら正常終了, 1... power up error, ... -- waitLoop ... 一時停止のための空ループ --- 引数1: 繰り返し回数 --- 引数2: 戻り番地 --- return 時の stack の top ... 0なら正常終了 -- wi2c1 ... i2cデバイスに 1バイトのデータを送信 --- 引数1: 送信する 1 byte data (16bitの下位1byte) --- 引数2: データが受信されるスレーブデバイス側アドレス --- 引数3: デバイスのI2Cアドレス --- 引数4: return address --- return 時の stack の top ... return code, 0なら正常終了, 1... power up error, ... -- wi2c2 ... i2c デバイスに2バイトのデータを送信 --- 引数1: 送信する 2 byte data (16bit の上位1byte と下位1byte) --- 引数2: データが受信されるスレーブデバイス側アドレス --- 引数3: デバイスのI2Cアドレス --- 引数4: return アドレス --- return 時の stack の top ... return code, 0なら正常終了, 1... power up error, ... -- wi2c4 ... i2c デバイスに4バイトのデータを送信 --- 引数1: 送信する最初の 2 byte data/4byte (16bit の上位1byte と下位1byte) --- 引数1: 送信する次の 2 byte data/4byte (16bit の上位1byte と下位1byte) --- 引数2: データが受信されるスレーブデバイス側アドレス --- 引数3: デバイスのI2Cアドレス --- 引数4: return アドレス --- return 時の stack の top ... return code, 0なら正常終了, 1... power up error, ... -- si2c1 ... i2cバスに1バイトのデータを送信 --- 引数1: 送信する1byte のデータ列 --- 引数2: return アドレス --- (return 時には値を push しない) -- ri2c1 ... i2cから1バイトデータを入力 --- 引数 1 (最初にpush): 結果(i2cデバイスから入力したデータ, 16bit の下位8bit , 1byte )を格納するメモリーのアドレス。 --- 引数 2 (2番目に push): i2cデバイスからデータを読み出すレジスタの番号(1byte, 16bit の下位8bit)。 --- 引数 3 (3番目に push): i2c slave device の 7bitのアドレス。(16bit の下位7bit) --- 引数 4 (4番目に push): return address(16bit の下位12bit) --- return 時の stack の top: return code ... 0なら正常終了。 -- SubI2C1 ... 第一引数で指定したアドレスにあるバイト数ほど、そのアドレスの次のアドレスから格納されている i2c の scl, sda の操作データを, i2c バスに流します。[[サブルーチンコールその1]]のSubI2C1と同じです。 --- 引数 1 : i2cの操作データのデータ数を格納したアドレス. この次のアドレスから操作データが格納されている。 --- 引数 2 : return address -- si2c1 ... 第一引数で指定した1byteの内容を、そのまま i2c バスに流します。アドレス+送受信フラグの送信や、レジスタ指定などに使います。 --- 引数 1 : 送信する1バイトのデータ(16bit の下位8bit) --- 引数 2 : return address - ram.v module ram(clk, load, addr, d, q ); parameter DWIDTH=16, AWIDTH=12, WORDS=4096; input clk, load; input [AWIDTH-1:0] addr; input [DWIDTH-1:0] d; output [DWIDTH-1:0] q; reg [DWIDTH-1:0] q; reg [DWIDTH-1:0] mem [WORDS-1:0]; always @(posedge clk) begin if(load) mem[addr] <= d; q <= mem[addr]; end integer i; initial begin for(i=0; i<WORDS; i=i+1) mem[i]=12'h000; /* // i2c light sensor test main main_loop: pushi main_light_val pushi main_1 jmp getLight main_1: jz main_2 pushi 0x03 out halt jmp main_loop main_2: push main_light_val pushi 0x03 bor out pushi 0x100 pushi main_3 jmp waitLoop // wait main_3: jz main_loop pushi 0x07 out halt jmp main_loop main_light_val: 0x00 // // getLight // get light strength value from the i2c light sensor, grove // arg 0: return address, arg 1: address for the received value getLight: push getLight_jmp bor pop getLight_rtn pop getLight_valAddr // pushi 0x03 // power up pushi 0x80 // command, register 0 push lightSensorAddr //lightSensor pushi getLight_a1 // push return addr jmp wi2c1 // call wi2c1 getLight_a1: pop getLightRtnCode push getLightRtnCode jz getLight_a1_1 pushi 1 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a1_1: pushi 0x00 // pushi 0x81 push lightSensorAddr pushi getLight_a2 jmp wi2c1 getLight_a2: pop getLightRtnCode push getLightRtnCode jz getLight_a2_1 pushi 2 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a2_1: pushi 0x00 // scale pushi 0x86 // register to set the scale push lightSensorAddr // lightSensor pushi getLight_a3 jmp wi2c1 getLight_a3: pop getLightRtnCode push getLightRtnCode jz getLight_a3_1 pushi 3 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a3_1: pushi 0x00 // power down pushi 0x80 push lightSensorAddr pushi getLight_a4 jmp wi2c1 getLight_a4: pop getLightRtnCode push getLightRtnCode jz getLight_a4_1 pushi 4 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a4_1: pushi 0x03 // power up again pushi 0x80 push lightSensorAddr pushi getLight_a5 jmp wi2c1 getLight_a5: pop getLightRtnCode push getLightRtnCode jz getLight_a5_1 pushi 5 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a5_1: PUSHI lightSensorCh0l // push arg1... the address for receiving the result(temprature) PUSHi 0x8c // push the register no. 0 push lightSensorAddr // push the I2C light sensor address, 0x4b pushi getLight_a6 // push the return address JMP ri2c1 // call the ri2c1 ... read 1 byte data from the i2c device, getLight_a6: pop getLightRtnCode push getLightRtnCode jz getLight_a6_1 pushi 6 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a6_1: PUSHI lightSensorCh0h // push arg1... the address for receiving the result(temprature) PUSHi 0x8d // push the register no. 0 push lightSensorAddr // push the I2C light sensor address, 0x4b pushi getLight_a7 // push the return address JMP ri2c1 // call the ri2c1 ... read 1 byte data from the i2c device, getLight_a7: pop getLightRtnCode push getLightRtnCode jz getLight_a7_1 pushi 7 // error to read the ack of the i2c address jmp getLight_rtn // getLight_a7_1: push getLight_valAddr push lightSensorCh0h pushi 0x08 shr push lightSensorCh0l bor st pushi 0 getLight_rtn: jmp 0x0000 getLight_err: 0x0000 getLight_valAddr: 0x0000 getLightRtnCode: 0x0000 getLight_jmp: 0x4000 getLight_rtnval: 0x0000 getLight_valAddr: 0x0000 lightSensorCh0l: 0x0000 lightSensorCh0h: 0x0000 lightSensorRC0h: 0x008c // read 1 byte from the register d, IR+visible lightSensorRC0l: 0x008d lightSensorRC1h: 0x008e lightSensorRC1l: 0x008f lightSensorAddr: 0x0029 // grove i2c light sensor lightReadReg: 0x008d // read 1 byte from the register d, IR+visible lightAddr: 0x0029 // grove i2c light sensor // // waitLoop // wait for the arg1 times // arg0: return address, arg1: repeat times waitLoop: push waitLoop_jmp bor pop waitLoop_rtn pop waitLoop_times waitLoop_a0: push waitLoop_times pushi 1 sub pop waitLoop_times push waitLoop_times jnz waitLoop_a0 pushi 0 waitLoop_rtn: 0x0000 waitLoop_jmp: 0x4000 waitLoop_times: 0x000 // // wi2c1 // Write 1 byte to an i2c device // arg 0: return address, arg1:device address, arg2:register no, arg3:1 byte value // return ... if 0: normal return, else: return with error. // wi2c1: PUSH wi2c1_jmp // subroutine. the 1st step to make the return instruction BOR // make the return instruction using arg1 and the previous instruction POP wi2c1_rtn // save the return instruction POP wi2c1_addr // save the arg1, the i2c slave address pop wi2c1_reg // save the arg2, destination register address pop wi2c1_val // save the value which will be assiinged to the destination register. // PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI wi2c1_a1 // push the return address JMP SubI2C1 // call the subroutine // wi2c1_a1: push wi2c1_addr pushi 1 shl // make the i2c device address with the write flag // pushi wi2c1_a2 jmp si2c1 // wi2c1_a2: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c1_a3 // JMP SubI2C1 // call the subroutine // wi2c1_a3: in // input the ack pushi 0x01 band jz wi2c1_a3_1 pushi 1 // error to read the ack of the i2c address jmp wi2c1_err wi2c1_a3_1: push wi2c1_reg pushi wi2c1_a4 jmp si2c1 // wi2c1_a4: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c1_a5 // JMP SubI2C1 // call the subroutine // wi2c1_a5: in // input the ack pushi 0x01 band jz wi2c1_a5_1 pushi 2 // error to read the ack of the i2c register no. jmp wi2c1_err wi2c1_a5_1: push wi2c1_val pushi wi2c1_a6 jmp si2c1 // wi2c1_a6: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c1_a7 // JMP SubI2C1 // call the subroutine // wi2c1_a7: in // input the ack pushi 0x01 band jz wi2c1_a7_1 pushi 3 // error to read the ack of the i2c register val. jmp wi2c1_err wi2c1_a7_1: PUSHI i2cStop // push arg1 .... write the ack PUSHI wi2c1_a8 // push the return address JMP SubI2C1 // call the subroutine // wi2c1_a8: pushI 0 wi2c1_rtn: jmp 0x000 // return wi2c1_err: pop wi2c1_ercode PUSHI i2cStop // push arg1 .... write the ack PUSHI wi2c1_a9 // push the return address JMP SubI2C1 // call the subroutine wi2c1_a9: push wi2c1_ercode jmp wi2c1_rtn wi2c1_jmp: 0x4000 wi2c1_addr: 0x0000 wi2c1_reg: 0x0000 wi2c1_val: 0x0000 wi2c1\ercode: 0x0000 // // wi2c2 // Write 2 byte to an i2c device // arg 0: return address, arg1:device address, arg2:register no, arg3:two byte values // return ... if 1: ok, 0: error // wi2c2: PUSH wi2c2_jmp // subroutine. the 1st step to make the return instruction BOR // make the return instruction using arg1 and the previous instruction POP wi2c2_rtn // save the return instruction POP wi2c2_addr // save the arg1, the i2c slave address pop wi2c2_reg // save the arg2, destination register address pop wi2c2_val // save the value which will be assiinged to the destination register. // PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI wi2c2_a1 // push the return address JMP SubI2C1 // call the subroutine // wi2c2_a1: push wi2c2_addr pushi 1 shl // make the i2c device address with the write flag pop wi2c2_waddr // pushi wi2c2_a2 jmp si2c1 // wi2c2_a2: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c2_a3 // JMP SubI2C1 // call the subroutine // wi2c2_a3: in // input the ack pushi 0x01 band jz wi2c2_a3_1 pushi 1 // error to read the ack of the i2c address jmp wi2c2_err wi2c2_a3_1: push wi2c2_reg pushi wi2c2_a4 jmp si2c1 // wi2c2_a4: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c2_a5 // JMP SubI2C1 // call the subroutine // wi2c2_a5: in // input the ack pushi 0x01 band jz wi2c2_a5_1 pushi 2 // error to read the ack of the i2c register no. jmp wi2c2_err wi2c_a5_1: push wi2c2_val pushi 0x00ff band pushi wi2c2_a6 jmp si2c1 // wi2c2_a6: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c2_a7 // JMP SubI2C1 // call the subroutine // wi2c2_a7: in // input the ack pushi 0x01 band jz wi2c2_a7_1 pushi 3 // error to read the ack of the i2c register no. jmp wi2c2_err wi2c2_a7_1: push wi2c2_val pushi 8 shr pushi wi2c2_a8 jmp si2c1 // wi2c2_a8: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c2_a9 // JMP SubI2C1 // call the subroutine // wi2c2_a9: in // input the ack pushi 0x01 band jz wi2c2_a9_1 pushi 4 // error to read the ack of the i2c register no. jmp wi2c2_err wi2c2_a9_1: PUSHI i2cStop // push arg1 .... write the ack PUSHI wi2c2_a10 // push the return address JMP SubI2C1 // call the subroutine // wi2c2_a10: pushI 0 wi2c2_rtn: jmp 0x000 // return wi2c2_err: pop wi2c2_ercode PUSHI i2cStop // push arg1 .... write the ack PUSHI wi2c2_a11 // push the return address JMP SubI2C1 // call the subroutine wi2c2_a11: push wi2c2_ercode jmp wi2c2_rtn wi2c2_jmp: 0x4000 wi2c2_addr: 0x0000 wi2c2_reg: 0x0000 wi2c2_val: 0x0000 wi2c2_ercode: 0x0000 // // wi2c4 // Write 4 byte to an i2c device // arg 0: return address, arg1:device address, arg2:register no, arg3:1st 2 byte, arg4: 2nd 2byte, // return ... if 1: ok, 0: error // wi2c4: PUSH wi2c4_jmp // subroutine. the 1st step to make the return instruction BOR // make the return instruction using arg1 and the previous instruction POP wi2c4_rtn // save the return instruction POP wi2c4_addr // save the arg1, the i2c slave address pop wi2c4_reg // save the arg2, destination register address pop wi2c4_val2 // save the 1st value which will be assiinged to the destination registers. pop wi2c4_val1 // save the 2nd value which will be assiinged to the destination register2. // PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI wi2c4_a1 // push the return address JMP SubI2C1 // call the subroutine // wi2c4_a1: push wi2c4_addr pushi 1 shl // make the i2c device address with the write flag pushi wi2c4_a2 jmp si2c1 // wi2c4_a2: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c4_a3 // JMP SubI2C1 // call the subroutine // wi2c4_a3: in // input the ack pushi 0x01 band jz wi2c4_a3_1 pushi 1 // error to read the ack of the i2c address jmp wi2c4_err wi2c4_a3_1: push wi2c4_reg pushi wi2c4_a4 jmp si2c1 // wi2c4_a4: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c4_a5 // JMP SubI2C1 // call the subroutine // wi2c4_a5: in // input the ack pushi 0x01 band jz wi2c4_a5_1 pushi 2 // error to read the ack of the i2c register no. jmp wi2c4_err wi2c4_a5_1: push wi2c4_val1 pushi 0x00ff band pushi wi2c4_a6 jmp si2c1 // wi2c4_a6: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c4_a7 // JMP SubI2C1 // call the subroutine // wi2c4_a7: in // input the ack pushi 0x01 band jz wi2c4_a7_1 pushi 3 // error to read the ack of the lsb of the val1 jmp wi2c4_err wi2c4_a7_1: push wi2c4_val1 pushi 8 shr pushi wi2c4_a8 jmp si2c1 // wi2c4_a8: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c4_a9 // JMP SubI2C1 // call the subroutine // wi2c4_a9: in // input the ack pushi 0x01 band jz wi2c4_a9_1 pushi 4 // error to read the ack of the msb of the val1 jmp wi2c4_err wi2c4_a9_1: push wi2c4_val2 pushi 0x00ff band pushi wi2c4_a10 jmp si2c1 // wi2c4_a10: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c4_a11 // JMP SubI2C1 // call the subroutine // wi2c4_a11: in // input the ack pushi 0x01 band jz wi2c4_a11_1 pushi 5 // error to read the ack of the lsb of the val1 jmp wi2c4_err wi2c4_a11_1: push wi2c4_val2 pushi 8 shr pushi wi2c4_a12 jmp si2c1 // wi2c4_a12: PUSHI i2cRAck // push arg1 .... read the ack PUSHI wi2c4_a13 // JMP SubI2C1 // call the subroutine // wi2c4_a13: in // input the ack pushi 0x01 band jz wi2c4_a13_1 pushi 6 // error to read the ack of the lsb of the val1 jmp wi2c4_err wi2c4_a13_1: PUSHI i2cStop // push arg1 .... write the ack PUSHI wi2c4_a14 // push the return address JMP SubI2C1 // call the subroutine // wi2c4_a14: pushI 0 wi2c4_rtn: jmp 0x000 // return wi2c4_err: pop wi2c4_ercode PUSHI i2cStop // push arg1 .... write the ack PUSHI wi2c4_a15 // push the return address JMP SubI2C1 // call the subroutine wi2c4_a15: push wi2c4_ercode jmp wi2c4_rtn wi2c4_jmp: 0x4000 wi2c4_addr: 0x0000 wi2c4_reg: 0x0000 wi2c4_val1: 0x0000 wi2c4_val2: 0x0000 wi2c4_ercode: 0x0000 // // si2c1 // Write 1 byte series to an i2c device // ... arg1 ... device address, arg1... register no. arg2... 1 byte value // return ... if 1: ok, 0: error // si2c1: PUSH si2c1_jmp // subroutine. the 1st step to make the return instruction BOR // make the return instruction using arg1 and the previous instruction POP si2c1_rtn // save the return instruction POP si2c1_val PUSHI 8 POP si2c1_i si2c1_a3: push si2c1_val pushi 0x0080 band JNZ si2c1_a1 pushi 0x0000 out pushi 0x0002 out pushi 0x0000 out jmp si2c1_a2 si2c1_a1: pushi 0x0001 out pushi 0x0003 out pushi 0x0001 out si2c1_a2: push si2c1_val pushi 1 shl pop si2c1_val push si2c1_i pushi 1 sub pop si2c1_i push si2c1_i jnz si2c1_a3 si2c1_rtn: jmp 0x000 si2c1_jmp: 0x4000 si2c1_val: 0x0000 si2c1_i: 0x0000 // // ri2c1 // Read 1 byte from an i2c device // ... arg1 ... device address, arg2 ... register number, arg3 .... the address for receiving the data // return ... if 1:ok, 0:error // ri2c1: PUSH ri2c1_jmp // subroutine. the 1st step to make the return instruction BOR // make the return instruction using arg1 and the previous instruction POP ri2c1_rtn // save the return instruction POP ri2c1_addr // save the arg1, the i2c slave address pop ri2c1_reg // save the arg2, destination register address pop ri2c1_raddr // save the address which receives the value of the destination register. // PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI ri2c1_a1 // push the return address JMP SubI2C1 // call the subroutine // ri2c1_a1: push ri2c1_addr pushi 1 shl // make the i2c device address with the write flag pushi ri2c1_a2 jmp si2c1 // ri2c1_a2: PUSHI i2cRAck // push arg1 .... read the ack PUSHI ri2c1_a3 // JMP SubI2C1 // call the subroutine // ri2c1_a3: in // input the ack pushi 0x01 band jz ri2c1_a3_1 pushi 1 // error to read the ack of the i2c address jmp ri2c1_err ri2c1_a3_1: push ri2c1_reg pushi ri2c1_a4 jmp si2c1 // ri2c1_a4: PUSHI i2cRAck // push arg1 .... read the ack PUSHI ri2c1_a5 // JMP SubI2C1 // call the subroutine // ri2c1_a5: in // input the ack pushi 0x01 band jz ri2c1_a5_1 pushi 2 // error to read the ack of the i2c register no. jmp ri2c1_err ri2c1_a5_1: PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI ri2c1_a6 // push the return address JMP SubI2C1 // call the subroutine // ri2c1_a6: push ri2c1_addr pushi 1 shl // make the i2c device address with the read flag pushi 0x0001 BOR pushi ri2c1_a7 jmp si2c1 // ri2c1_a7: PUSHI i2cRAck // push arg1 .... read the ack PUSHI ri2c1_a8 // JMP SubI2C1 // call the subroutine // ri2c1_a8: in // input the ack pushi 0x01 band jz ri2c1_a8_1 pushi 3 // error to read the ack of the i2c address again. jmp ri2c1_err ri2c1_a8_1: pushi i2cRead pushi ri2c1_a9 jmp SubI2C1 // ri2c1_a9: push ri2c1_raddr in st // PUSHI i2cNAck // push arg1 .... Ack PUSHI ri2c1_a10 // JMP SubI2C1 // call the subroutine // ri2c1_a10: PUSHI i2cStop // push arg1 .... write the ack PUSHI ri2c1_a11 // push the return address JMP SubI2C1 // call the subroutine // ri2c1_a11: pushI 0 ri2c1_rtn: jmp 0x000 // return ri2c1_err: pop ri2c1_ercode PUSHI i2cStop // push arg1 .... write the ack PUSHI ri2c1_a12 // push the return address JMP SubI2C1 // call the subroutine ri2c1_a12: push ri2c1_ercode jmp ri2c1_rtn ri2c1_jmp: 0x4000 ri2c1_addr: 0x0000 ri2c1_reg: 0x0000 ri2c1_raddr: 0x0000 ri2c1_ercode: 0x0000 // // ri2c2 // Read 2 byte series from an i2c device // ... arg1 ... device address, arg2 ... register number, arg3 ... the address for receiving the data // return ... if 1: ok, 0:error // ri2c2: PUSH ri2c2_jmp // subroutine. the 1st step to make the return instruction BOR // make the return instruction using arg1 and the previous instruction POP ri2c2_rtn // save the return instruction POP ri2c2_addr // save the arg1, the i2c slave address pop ri2c2_reg // save the arg2, destination register address pop ri2c2_raddr // save the address which receives the value of the destination register. // PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI ri2c2_a1 // push the return address JMP SubI2C1 // call the subroutine // ri2c2_a1: push ri2c2_addr pushi 1 shl // make the i2c device address with the write flag // pushi ri2c2_a2 jmp si2c1 // ri2c2_a2: PUSHI i2cRAck // push arg1 .... read the ack PUSHI ri2c2_a3 // JMP SubI2C1 // call the subroutine // ri2c2_a3: in // input the ack pushi 0x01 band jz ri2c2_a3_1 pushi 1 // error to read the ack of the i2c address jmp ri2c2_err ri2c2_a3_1: push ri2c2_reg pushi ri2c2_a4 jmp si2c1 // ri2c2_a4: PUSHI i2cRAck // push arg1 .... read the ack PUSHI ri2c2_a5 // JMP SubI2C1 // call the subroutine // ri2c2_a5: in // input the ack pushi 0x01 band jz ri2c2_a5_1 pushi 2 // error to read the ack of the i2c register no. jmp ri2c2_err ri2c2_a5_1: PUSHI i2cStart // push arg1... the i2c slave Addr PUSHI ri2c2_a6 // push the return address JMP SubI2C1 // call the subroutine // ri2c2_a6: push ri2c2_addr pushi 1 shl // make the i2c device address with the read flag pushi 0x0001 BOR pushi ri2c2_a7 jmp si2c1 // ri2c2_a7: PUSHI i2cRAck // push arg1 .... read the ack PUSHI ri2c2_a8 // JMP SubI2C1 // call the subroutine // ri2c2_a8: in // input the ack pushi 0x01 band jz ri2c2_a8_1 pushi 3 // error to read the ack of the i2c address again. jmp ri2c2_err ri2c2_a8_1: pushi i2cRead pushi ri2c2_l9 jmp SubI2C1 // ri2c2_l9: in pushi 8 shl pop ri2c2_val1 // PUSHI i2cWAck // push arg1 .... write the ack PUSHI ri2c2_a10 // JMP SubI2C1 // call the subroutine // ri2c2_a10: pushi i2cRead pushi ri2c2_a11 jmp SubI2C1 // ri2c2_a11: push ri2c2_raddr in push ri2c2_val1 bor st // PUSHI i2cNAck // push arg1 .... Ack PUSHI ri2c2_a12 // JMP SubI2C1 // call the subroutine // ri2c2_a12: PUSHI i2cStop // push arg1 .... write the ack PUSHI ri2c2_a13 // push the return address JMP SubI2C1 // call the subroutine // ri2c2_a13: pushI 0 // no error ri2c2_rtn: jmp 0x000 // return ri2c2_err: pop ri2c2_ercode PUSHI i2cStop // push arg1 .... write the ack PUSHI ri2c2_a14 // push the return address JMP SubI2C1 // call the subroutine ri2c2_a14: push ri2c2_ercode jmp ri2c2_rtn ri2c2_jmp: 0x4000 ri2c2_addr: 0x0000 ri2c2_reg: 0x0000 ri2c2_raddr: 0x0000 ri2c2_val1: 0x0000 ri2c2_ercode: 0x0000 // // SubI2C1 ... send the [arg1] steps of I2C [scl,sda] sequence after the address of [arg1 +1] to the i2c bus. // SubI2C1: PUSH LblJMP // subroutine. the 1st step to return instruction BOR // make the return instruction using arg1 and the previous instruction POP RtnSub1 // save the return instruction POP Sub1Data2 // save the arg1 PUSH Sub1Data2 LD POP N PUSH Sub1Data2 PUSHI 1 ADD POP Sub1SA PUSHI 0 POP i L1: PUSH i PUSH Sub1SA ADD LD //... Sub1S[i]; OUT //... print(Sub1S[i]) ; PUSH i PUSHI 1 ADD POP i PUSH i PUSH N SUB JNZ L1 // if(i<n) goto L1; RtnSub1: JMP 0x000 // return LblJMP: 0x4000 Sub1Data2: 0x0000 Sub1SA: 0x0000 i: 0x0000 N: 0x0000 // // data for controlling i2c // (MSB) ...... scl, sda (LSB) // // I2C start i2cStart: 3 1 //01 3 //11 2 //10 0 //00 // // I2C AddrWrite i2cAddrW: 3 0 // 00 2 // 10 send 0 ... write 0 // 00 // // I2C AddrRead i2cAddrR: 3 1 // 01 3 // 11 ... read 1 // 01 // // I2C i2cRAck: 3 1 // 01 3 // 11 read ack 1 // 01 // // I2C Write Ack i2cWAck: 3 0 // 00 2 // 10 send 0 ... write 0 // 00 // // I2C NAck i2cNAck: 3 1 //01 3 // ... read 1 // // // // stop i2cStop: 3 2 // 10 3 // 11 stop the transfering 3 // 11 // // I2C read 1byte i2cRead: 0x0011 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 3 // 11 1 // 01 */ mem[12'h000]=16'h1014 ; //main_loop: pushi main_light_val mem[12'h001]=16'h1003 ; // pushi main_1 mem[12'h002]=16'h4015 ; // jmp getLight mem[12'h003]=16'h5008 ; //main_1: jz main_2 mem[12'h004]=16'h1003 ; // pushi 0x03 mem[12'h005]=16'he000 ; // out mem[12'h006]=16'h0000 ; // halt mem[12'h007]=16'h4000 ; // jmp main_loop mem[12'h008]=16'h2014 ; //main_2: push main_light_val mem[12'h009]=16'h1003 ; // pushi 0x03 mem[12'h00a]=16'hf006 ; // bor mem[12'h00b]=16'he000 ; // out mem[12'h00c]=16'h1100 ; // pushi 0x100 mem[12'h00d]=16'h100f ; // pushi main_3 mem[12'h00e]=16'h4077 ; // jmp waitLoop mem[12'h00f]=16'h5000 ; //main_3: jz main_loop mem[12'h010]=16'h1007 ; // pushi 0x07 mem[12'h011]=16'he000 ; // out mem[12'h012]=16'h0000 ; // halt mem[12'h013]=16'h4000 ; // jmp main_loop mem[12'h014]=16'h0000 ; //main_light_val: 0x00 mem[12'h015]=16'h206b ; //getLight: push getLight_jmp mem[12'h016]=16'hf006 ; // bor mem[12'h017]=16'h3067 ; // pop getLight_rtn mem[12'h018]=16'h3069 ; // pop getLight_valAddr mem[12'h019]=16'h1003 ; // pushi 0x03 mem[12'h01a]=16'h1080 ; // pushi 0x80 mem[12'h01b]=16'h2074 ; // push lightSensorAddr mem[12'h01c]=16'h101e ; // pushi getLight_a1 mem[12'h01d]=16'h4085 ; // jmp wi2c1 mem[12'h01e]=16'h306a ; //getLight_a1: pop getLightRtnCode mem[12'h01f]=16'h206a ; // push getLightRtnCode mem[12'h020]=16'h5023 ; // jz getLight_a1_1 mem[12'h021]=16'h1001 ; // pushi 1 mem[12'h022]=16'h4067 ; // jmp getLight_rtn mem[12'h023]=16'h1000 ; //getLight_a1_1: pushi 0x00 mem[12'h024]=16'h1081 ; // pushi 0x81 mem[12'h025]=16'h2074 ; // push lightSensorAddr mem[12'h026]=16'h1028 ; // pushi getLight_a2 mem[12'h027]=16'h4085 ; // jmp wi2c1 mem[12'h028]=16'h306a ; //getLight_a2: pop getLightRtnCode mem[12'h029]=16'h206a ; // push getLightRtnCode mem[12'h02a]=16'h502d ; // jz getLight_a2_1 mem[12'h02b]=16'h1002 ; // pushi 2 mem[12'h02c]=16'h4067 ; // jmp getLight_rtn mem[12'h02d]=16'h1000 ; //getLight_a2_1: pushi 0x00 mem[12'h02e]=16'h1086 ; // pushi 0x86 mem[12'h02f]=16'h2074 ; // push lightSensorAddr mem[12'h030]=16'h1032 ; // pushi getLight_a3 mem[12'h031]=16'h4085 ; // jmp wi2c1 mem[12'h032]=16'h306a ; //getLight_a3: pop getLightRtnCode mem[12'h033]=16'h206a ; // push getLightRtnCode mem[12'h034]=16'h5037 ; // jz getLight_a3_1 mem[12'h035]=16'h1003 ; // pushi 3 mem[12'h036]=16'h4067 ; // jmp getLight_rtn mem[12'h037]=16'h1000 ; //getLight_a3_1: pushi 0x00 mem[12'h038]=16'h1080 ; // pushi 0x80 mem[12'h039]=16'h2074 ; // push lightSensorAddr mem[12'h03a]=16'h103c ; // pushi getLight_a4 mem[12'h03b]=16'h4085 ; // jmp wi2c1 mem[12'h03c]=16'h306a ; //getLight_a4: pop getLightRtnCode mem[12'h03d]=16'h206a ; // push getLightRtnCode mem[12'h03e]=16'h5041 ; // jz getLight_a4_1 mem[12'h03f]=16'h1004 ; // pushi 4 mem[12'h040]=16'h4067 ; // jmp getLight_rtn mem[12'h041]=16'h1003 ; //getLight_a4_1: pushi 0x03 mem[12'h042]=16'h1080 ; // pushi 0x80 mem[12'h043]=16'h2074 ; // push lightSensorAddr mem[12'h044]=16'h1046 ; // pushi getLight_a5 mem[12'h045]=16'h4085 ; // jmp wi2c1 mem[12'h046]=16'h306a ; //getLight_a5: pop getLightRtnCode mem[12'h047]=16'h206a ; // push getLightRtnCode mem[12'h048]=16'h504b ; // jz getLight_a5_1 mem[12'h049]=16'h1005 ; // pushi 5 mem[12'h04a]=16'h4067 ; // jmp getLight_rtn mem[12'h04b]=16'h106e ; //getLight_a5_1: PUSHI lightSensorCh0l mem[12'h04c]=16'h108c ; // PUSHi 0x8c mem[12'h04d]=16'h2074 ; // push lightSensorAddr mem[12'h04e]=16'h1050 ; // pushi getLight_a6 mem[12'h04f]=16'h41a6 ; // JMP ri2c1 mem[12'h050]=16'h306a ; //getLight_a6: pop getLightRtnCode mem[12'h051]=16'h206a ; // push getLightRtnCode mem[12'h052]=16'h5055 ; // jz getLight_a6_1 mem[12'h053]=16'h1006 ; // pushi 6 mem[12'h054]=16'h4067 ; // jmp getLight_rtn mem[12'h055]=16'h106f ; //getLight_a6_1: PUSHI lightSensorCh0h mem[12'h056]=16'h108d ; // PUSHi 0x8d mem[12'h057]=16'h2074 ; // push lightSensorAddr mem[12'h058]=16'h105a ; // pushi getLight_a7 mem[12'h059]=16'h41a6 ; // JMP ri2c1 mem[12'h05a]=16'h306a ; //getLight_a7: pop getLightRtnCode mem[12'h05b]=16'h206a ; // push getLightRtnCode mem[12'h05c]=16'h505f ; // jz getLight_a7_1 mem[12'h05d]=16'h1007 ; // pushi 7 mem[12'h05e]=16'h4067 ; // jmp getLight_rtn mem[12'h05f]=16'h2069 ; //getLight_a7_1: push getLight_valAddr mem[12'h060]=16'h206f ; // push lightSensorCh0h mem[12'h061]=16'h1008 ; // pushi 0x08 mem[12'h062]=16'hf004 ; // shr mem[12'h063]=16'h206e ; // push lightSensorCh0l mem[12'h064]=16'hf006 ; // bor mem[12'h065]=16'h8000 ; // st mem[12'h066]=16'h1000 ; // pushi 0 mem[12'h067]=16'h4000 ; //getLight_rtn: jmp 0x0000 mem[12'h068]=16'h0000 ; //getLight_err: 0x0000 mem[12'h069]=16'h0000 ; //getLight_valAddr: 0x0000 mem[12'h06a]=16'h0000 ; //getLightRtnCode: 0x0000 mem[12'h06b]=16'h4000 ; //getLight_jmp: 0x4000 mem[12'h06c]=16'h0000 ; //getLight_rtnval: 0x0000 mem[12'h06d]=16'h0000 ; //getLight_valAddr: 0x0000 mem[12'h06e]=16'h0000 ; //lightSensorCh0l: 0x0000 mem[12'h06f]=16'h0000 ; //lightSensorCh0h: 0x0000 mem[12'h070]=16'h008c ; //lightSensorRC0h: 0x008c mem[12'h071]=16'h008d ; //lightSensorRC0l: 0x008d mem[12'h072]=16'h008e ; //lightSensorRC1h: 0x008e mem[12'h073]=16'h008f ; //lightSensorRC1l: 0x008f mem[12'h074]=16'h0029 ; //lightSensorAddr: 0x0029 mem[12'h075]=16'h008d ; //lightReadReg: 0x008d mem[12'h076]=16'h0029 ; //lightAddr: 0x0029 mem[12'h077]=16'h2083 ; //waitLoop: push waitLoop_jmp mem[12'h078]=16'hf006 ; // bor mem[12'h079]=16'h3082 ; // pop waitLoop_rtn mem[12'h07a]=16'h3084 ; // pop waitLoop_times mem[12'h07b]=16'h2084 ; //waitLoop_a0: push waitLoop_times mem[12'h07c]=16'h1001 ; // pushi 1 mem[12'h07d]=16'hf001 ; // sub mem[12'h07e]=16'h3084 ; // pop waitLoop_times mem[12'h07f]=16'h2084 ; // push waitLoop_times mem[12'h080]=16'h607b ; // jnz waitLoop_a0 mem[12'h081]=16'h1000 ; // pushi 0 mem[12'h082]=16'h0000 ; //waitLoop_rtn: 0x0000 mem[12'h083]=16'h4000 ; //waitLoop_jmp: 0x4000 mem[12'h084]=16'h0000 ; //waitLoop_times: 0x000 mem[12'h085]=16'h20bf ; //wi2c1: PUSH wi2c1_jmp mem[12'h086]=16'hf006 ; // BOR mem[12'h087]=16'h30b8 ; // POP wi2c1_rtn mem[12'h088]=16'h30c0 ; // POP wi2c1_addr mem[12'h089]=16'h30c1 ; // pop wi2c1_reg mem[12'h08a]=16'h30c2 ; // pop wi2c1_val mem[12'h08b]=16'h1271 ; // PUSHI i2cStart mem[12'h08c]=16'h108e ; // PUSHI wi2c1_a1 mem[12'h08d]=16'h4251 ; // JMP SubI2C1 mem[12'h08e]=16'h20c0 ; //wi2c1_a1: push wi2c1_addr mem[12'h08f]=16'h1001 ; // pushi 1 mem[12'h090]=16'hf003 ; // shl mem[12'h091]=16'h1093 ; // pushi wi2c1_a2 mem[12'h092]=16'h4181 ; // jmp si2c1 mem[12'h093]=16'h127e ; //wi2c1_a2: PUSHI i2cRAck mem[12'h094]=16'h1096 ; // PUSHI wi2c1_a3 mem[12'h095]=16'h4251 ; // JMP SubI2C1 mem[12'h096]=16'hd000 ; //wi2c1_a3: in mem[12'h097]=16'h1001 ; // pushi 0x01 mem[12'h098]=16'hf005 ; // band mem[12'h099]=16'h509c ; // jz wi2c1_a3_1 mem[12'h09a]=16'h1001 ; // pushi 1 mem[12'h09b]=16'h40b9 ; // jmp wi2c1_err mem[12'h09c]=16'h20c1 ; //wi2c1_a3_1: push wi2c1_reg mem[12'h09d]=16'h109f ; // pushi wi2c1_a4 mem[12'h09e]=16'h4181 ; // jmp si2c1 mem[12'h09f]=16'h127e ; //wi2c1_a4: PUSHI i2cRAck mem[12'h0a0]=16'h10a2 ; // PUSHI wi2c1_a5 mem[12'h0a1]=16'h4251 ; // JMP SubI2C1 mem[12'h0a2]=16'hd000 ; //wi2c1_a5: in mem[12'h0a3]=16'h1001 ; // pushi 0x01 mem[12'h0a4]=16'hf005 ; // band mem[12'h0a5]=16'h50a8 ; // jz wi2c1_a5_1 mem[12'h0a6]=16'h1002 ; // pushi 2 mem[12'h0a7]=16'h40b9 ; // jmp wi2c1_err mem[12'h0a8]=16'h20c2 ; //wi2c1_a5_1: push wi2c1_val mem[12'h0a9]=16'h10ab ; // pushi wi2c1_a6 mem[12'h0aa]=16'h4181 ; // jmp si2c1 mem[12'h0ab]=16'h127e ; //wi2c1_a6: PUSHI i2cRAck mem[12'h0ac]=16'h10ae ; // PUSHI wi2c1_a7 mem[12'h0ad]=16'h4251 ; // JMP SubI2C1 mem[12'h0ae]=16'hd000 ; //wi2c1_a7: in mem[12'h0af]=16'h1001 ; // pushi 0x01 mem[12'h0b0]=16'hf005 ; // band mem[12'h0b1]=16'h50b4 ; // jz wi2c1_a7_1 mem[12'h0b2]=16'h1003 ; // pushi 3 mem[12'h0b3]=16'h40b9 ; // jmp wi2c1_err mem[12'h0b4]=16'h128a ; //wi2c1_a7_1: PUSHI i2cStop mem[12'h0b5]=16'h10b7 ; // PUSHI wi2c1_a8 mem[12'h0b6]=16'h4251 ; // JMP SubI2C1 mem[12'h0b7]=16'h1000 ; //wi2c1_a8: pushI 0 mem[12'h0b8]=16'h4000 ; //wi2c1_rtn: jmp 0x000 mem[12'h0b9]=16'h3000 ; //wi2c1_err: pop wi2c1_ercode mem[12'h0ba]=16'h128a ; // PUSHI i2cStop mem[12'h0bb]=16'h10bd ; // PUSHI wi2c1_a9 mem[12'h0bc]=16'h4251 ; // JMP SubI2C1 mem[12'h0bd]=16'h2000 ; //wi2c1_a9: push wi2c1_ercode mem[12'h0be]=16'h40b8 ; // jmp wi2c1_rtn mem[12'h0bf]=16'h4000 ; //wi2c1_jmp: 0x4000 mem[12'h0c0]=16'h0000 ; //wi2c1_addr: 0x0000 mem[12'h0c1]=16'h0000 ; //wi2c1_reg: 0x0000 mem[12'h0c2]=16'h0000 ; //wi2c1_val: 0x0000 mem[12'h0c3]=16'h0000 ; //wi2c1\ercode: 0x0000 mem[12'h0c4]=16'h210f ; //wi2c2: PUSH wi2c2_jmp mem[12'h0c5]=16'hf006 ; // BOR mem[12'h0c6]=16'h3108 ; // POP wi2c2_rtn mem[12'h0c7]=16'h3110 ; // POP wi2c2_addr mem[12'h0c8]=16'h3111 ; // pop wi2c2_reg mem[12'h0c9]=16'h3112 ; // pop wi2c2_val mem[12'h0ca]=16'h1271 ; // PUSHI i2cStart mem[12'h0cb]=16'h10cd ; // PUSHI wi2c2_a1 mem[12'h0cc]=16'h4251 ; // JMP SubI2C1 mem[12'h0cd]=16'h2110 ; //wi2c2_a1: push wi2c2_addr mem[12'h0ce]=16'h1001 ; // pushi 1 mem[12'h0cf]=16'hf003 ; // shl mem[12'h0d0]=16'h3000 ; // pop wi2c2_waddr mem[12'h0d1]=16'h10d3 ; // pushi wi2c2_a2 mem[12'h0d2]=16'h4181 ; // jmp si2c1 mem[12'h0d3]=16'h127e ; //wi2c2_a2: PUSHI i2cRAck mem[12'h0d4]=16'h10d6 ; // PUSHI wi2c2_a3 mem[12'h0d5]=16'h4251 ; // JMP SubI2C1 mem[12'h0d6]=16'hd000 ; //wi2c2_a3: in mem[12'h0d7]=16'h1001 ; // pushi 0x01 mem[12'h0d8]=16'hf005 ; // band mem[12'h0d9]=16'h50dc ; // jz wi2c2_a3_1 mem[12'h0da]=16'h1001 ; // pushi 1 mem[12'h0db]=16'h4109 ; // jmp wi2c2_err mem[12'h0dc]=16'h2111 ; //wi2c2_a3_1: push wi2c2_reg mem[12'h0dd]=16'h10df ; // pushi wi2c2_a4 mem[12'h0de]=16'h4181 ; // jmp si2c1 mem[12'h0df]=16'h127e ; //wi2c2_a4: PUSHI i2cRAck mem[12'h0e0]=16'h10e2 ; // PUSHI wi2c2_a5 mem[12'h0e1]=16'h4251 ; // JMP SubI2C1 mem[12'h0e2]=16'hd000 ; //wi2c2_a5: in mem[12'h0e3]=16'h1001 ; // pushi 0x01 mem[12'h0e4]=16'hf005 ; // band mem[12'h0e5]=16'h5000 ; // jz wi2c2_a5_1 mem[12'h0e6]=16'h1002 ; // pushi 2 mem[12'h0e7]=16'h4109 ; // jmp wi2c2_err mem[12'h0e8]=16'h2112 ; //wi2c_a5_1: push wi2c2_val mem[12'h0e9]=16'h10ff ; // pushi 0x00ff mem[12'h0ea]=16'hf005 ; // band mem[12'h0eb]=16'h10ed ; // pushi wi2c2_a6 mem[12'h0ec]=16'h4181 ; // jmp si2c1 mem[12'h0ed]=16'h127e ; //wi2c2_a6: PUSHI i2cRAck mem[12'h0ee]=16'h10f0 ; // PUSHI wi2c2_a7 mem[12'h0ef]=16'h4251 ; // JMP SubI2C1 mem[12'h0f0]=16'hd000 ; //wi2c2_a7: in mem[12'h0f1]=16'h1001 ; // pushi 0x01 mem[12'h0f2]=16'hf005 ; // band mem[12'h0f3]=16'h50f6 ; // jz wi2c2_a7_1 mem[12'h0f4]=16'h1003 ; // pushi 3 mem[12'h0f5]=16'h4109 ; // jmp wi2c2_err mem[12'h0f6]=16'h2112 ; //wi2c2_a7_1: push wi2c2_val mem[12'h0f7]=16'h1008 ; // pushi 8 mem[12'h0f8]=16'hf004 ; // shr mem[12'h0f9]=16'h10fb ; // pushi wi2c2_a8 mem[12'h0fa]=16'h4181 ; // jmp si2c1 mem[12'h0fb]=16'h127e ; //wi2c2_a8: PUSHI i2cRAck mem[12'h0fc]=16'h10fe ; // PUSHI wi2c2_a9 mem[12'h0fd]=16'h4251 ; // JMP SubI2C1 mem[12'h0fe]=16'hd000 ; //wi2c2_a9: in mem[12'h0ff]=16'h1001 ; // pushi 0x01 mem[12'h100]=16'hf005 ; // band mem[12'h101]=16'h5104 ; // jz wi2c2_a9_1 mem[12'h102]=16'h1004 ; // pushi 4 mem[12'h103]=16'h4109 ; // jmp wi2c2_err mem[12'h104]=16'h128a ; //wi2c2_a9_1: PUSHI i2cStop mem[12'h105]=16'h1107 ; // PUSHI wi2c2_a10 mem[12'h106]=16'h4251 ; // JMP SubI2C1 mem[12'h107]=16'h1000 ; //wi2c2_a10: pushI 0 mem[12'h108]=16'h4000 ; //wi2c2_rtn: jmp 0x000 mem[12'h109]=16'h3113 ; //wi2c2_err: pop wi2c2_ercode mem[12'h10a]=16'h128a ; // PUSHI i2cStop mem[12'h10b]=16'h110d ; // PUSHI wi2c2_a11 mem[12'h10c]=16'h4251 ; // JMP SubI2C1 mem[12'h10d]=16'h2113 ; //wi2c2_a11: push wi2c2_ercode mem[12'h10e]=16'h4108 ; // jmp wi2c2_rtn mem[12'h10f]=16'h4000 ; //wi2c2_jmp: 0x4000 mem[12'h110]=16'h0000 ; //wi2c2_addr: 0x0000 mem[12'h111]=16'h0000 ; //wi2c2_reg: 0x0000 mem[12'h112]=16'h0000 ; //wi2c2_val: 0x0000 mem[12'h113]=16'h0000 ; //wi2c2_ercode: 0x0000 mem[12'h114]=16'h217b ; //wi2c4: PUSH wi2c4_jmp mem[12'h115]=16'hf006 ; // BOR mem[12'h116]=16'h3174 ; // POP wi2c4_rtn mem[12'h117]=16'h317c ; // POP wi2c4_addr mem[12'h118]=16'h317d ; // pop wi2c4_reg mem[12'h119]=16'h317f ; // pop wi2c4_val2 mem[12'h11a]=16'h317e ; // pop wi2c4_val1 mem[12'h11b]=16'h1271 ; // PUSHI i2cStart mem[12'h11c]=16'h111e ; // PUSHI wi2c4_a1 mem[12'h11d]=16'h4251 ; // JMP SubI2C1 mem[12'h11e]=16'h217c ; //wi2c4_a1: push wi2c4_addr mem[12'h11f]=16'h1001 ; // pushi 1 mem[12'h120]=16'hf003 ; // shl mem[12'h121]=16'h1123 ; // pushi wi2c4_a2 mem[12'h122]=16'h4181 ; // jmp si2c1 mem[12'h123]=16'h127e ; //wi2c4_a2: PUSHI i2cRAck mem[12'h124]=16'h1126 ; // PUSHI wi2c4_a3 mem[12'h125]=16'h4251 ; // JMP SubI2C1 mem[12'h126]=16'hd000 ; //wi2c4_a3: in mem[12'h127]=16'h1001 ; // pushi 0x01 mem[12'h128]=16'hf005 ; // band mem[12'h129]=16'h512c ; // jz wi2c4_a3_1 mem[12'h12a]=16'h1001 ; // pushi 1 mem[12'h12b]=16'h4175 ; // jmp wi2c4_err mem[12'h12c]=16'h217d ; //wi2c4_a3_1: push wi2c4_reg mem[12'h12d]=16'h112f ; // pushi wi2c4_a4 mem[12'h12e]=16'h4181 ; // jmp si2c1 mem[12'h12f]=16'h127e ; //wi2c4_a4: PUSHI i2cRAck mem[12'h130]=16'h1132 ; // PUSHI wi2c4_a5 mem[12'h131]=16'h4251 ; // JMP SubI2C1 mem[12'h132]=16'hd000 ; //wi2c4_a5: in mem[12'h133]=16'h1001 ; // pushi 0x01 mem[12'h134]=16'hf005 ; // band mem[12'h135]=16'h5138 ; // jz wi2c4_a5_1 mem[12'h136]=16'h1002 ; // pushi 2 mem[12'h137]=16'h4175 ; // jmp wi2c4_err mem[12'h138]=16'h217e ; //wi2c4_a5_1: push wi2c4_val1 mem[12'h139]=16'h10ff ; // pushi 0x00ff mem[12'h13a]=16'hf005 ; // band mem[12'h13b]=16'h113d ; // pushi wi2c4_a6 mem[12'h13c]=16'h4181 ; // jmp si2c1 mem[12'h13d]=16'h127e ; //wi2c4_a6: PUSHI i2cRAck mem[12'h13e]=16'h1140 ; // PUSHI wi2c4_a7 mem[12'h13f]=16'h4251 ; // JMP SubI2C1 mem[12'h140]=16'hd000 ; //wi2c4_a7: in mem[12'h141]=16'h1001 ; // pushi 0x01 mem[12'h142]=16'hf005 ; // band mem[12'h143]=16'h5146 ; // jz wi2c4_a7_1 mem[12'h144]=16'h1003 ; // pushi 3 mem[12'h145]=16'h4175 ; // jmp wi2c4_err mem[12'h146]=16'h217e ; //wi2c4_a7_1: push wi2c4_val1 mem[12'h147]=16'h1008 ; // pushi 8 mem[12'h148]=16'hf004 ; // shr mem[12'h149]=16'h114b ; // pushi wi2c4_a8 mem[12'h14a]=16'h4181 ; // jmp si2c1 mem[12'h14b]=16'h127e ; //wi2c4_a8: PUSHI i2cRAck mem[12'h14c]=16'h114e ; // PUSHI wi2c4_a9 mem[12'h14d]=16'h4251 ; // JMP SubI2C1 mem[12'h14e]=16'hd000 ; //wi2c4_a9: in mem[12'h14f]=16'h1001 ; // pushi 0x01 mem[12'h150]=16'hf005 ; // band mem[12'h151]=16'h5154 ; // jz wi2c4_a9_1 mem[12'h152]=16'h1004 ; // pushi 4 mem[12'h153]=16'h4175 ; // jmp wi2c4_err mem[12'h154]=16'h217f ; //wi2c4_a9_1: push wi2c4_val2 mem[12'h155]=16'h10ff ; // pushi 0x00ff mem[12'h156]=16'hf005 ; // band mem[12'h157]=16'h1159 ; // pushi wi2c4_a10 mem[12'h158]=16'h4181 ; // jmp si2c1 mem[12'h159]=16'h127e ; //wi2c4_a10: PUSHI i2cRAck mem[12'h15a]=16'h115c ; // PUSHI wi2c4_a11 mem[12'h15b]=16'h4251 ; // JMP SubI2C1 mem[12'h15c]=16'hd000 ; //wi2c4_a11: in mem[12'h15d]=16'h1001 ; // pushi 0x01 mem[12'h15e]=16'hf005 ; // band mem[12'h15f]=16'h5162 ; // jz wi2c4_a11_1 mem[12'h160]=16'h1005 ; // pushi 5 mem[12'h161]=16'h4175 ; // jmp wi2c4_err mem[12'h162]=16'h217f ; //wi2c4_a11_1: push wi2c4_val2 mem[12'h163]=16'h1008 ; // pushi 8 mem[12'h164]=16'hf004 ; // shr mem[12'h165]=16'h1167 ; // pushi wi2c4_a12 mem[12'h166]=16'h4181 ; // jmp si2c1 mem[12'h167]=16'h127e ; //wi2c4_a12: PUSHI i2cRAck mem[12'h168]=16'h116a ; // PUSHI wi2c4_a13 mem[12'h169]=16'h4251 ; // JMP SubI2C1 mem[12'h16a]=16'hd000 ; //wi2c4_a13: in mem[12'h16b]=16'h1001 ; // pushi 0x01 mem[12'h16c]=16'hf005 ; // band mem[12'h16d]=16'h5170 ; // jz wi2c4_a13_1 mem[12'h16e]=16'h1006 ; // pushi 6 mem[12'h16f]=16'h4175 ; // jmp wi2c4_err mem[12'h170]=16'h128a ; //wi2c4_a13_1: PUSHI i2cStop mem[12'h171]=16'h1173 ; // PUSHI wi2c4_a14 mem[12'h172]=16'h4251 ; // JMP SubI2C1 mem[12'h173]=16'h1000 ; //wi2c4_a14: pushI 0 mem[12'h174]=16'h4000 ; //wi2c4_rtn: jmp 0x000 mem[12'h175]=16'h3180 ; //wi2c4_err: pop wi2c4_ercode mem[12'h176]=16'h128a ; // PUSHI i2cStop mem[12'h177]=16'h1179 ; // PUSHI wi2c4_a15 mem[12'h178]=16'h4251 ; // JMP SubI2C1 mem[12'h179]=16'h2180 ; //wi2c4_a15: push wi2c4_ercode mem[12'h17a]=16'h4174 ; // jmp wi2c4_rtn mem[12'h17b]=16'h4000 ; //wi2c4_jmp: 0x4000 mem[12'h17c]=16'h0000 ; //wi2c4_addr: 0x0000 mem[12'h17d]=16'h0000 ; //wi2c4_reg: 0x0000 mem[12'h17e]=16'h0000 ; //wi2c4_val1: 0x0000 mem[12'h17f]=16'h0000 ; //wi2c4_val2: 0x0000 mem[12'h180]=16'h0000 ; //wi2c4_ercode: 0x0000 mem[12'h181]=16'h21a3 ; //si2c1: PUSH si2c1_jmp mem[12'h182]=16'hf006 ; // BOR mem[12'h183]=16'h31a2 ; // POP si2c1_rtn mem[12'h184]=16'h31a4 ; // POP si2c1_val mem[12'h185]=16'h1008 ; // PUSHI 8 mem[12'h186]=16'h31a5 ; // POP si2c1_i mem[12'h187]=16'h21a4 ; //si2c1_a3: push si2c1_val mem[12'h188]=16'h1080 ; // pushi 0x0080 mem[12'h189]=16'hf005 ; // band mem[12'h18a]=16'h6192 ; // JNZ si2c1_a1 mem[12'h18b]=16'h1000 ; // pushi 0x0000 mem[12'h18c]=16'he000 ; // out mem[12'h18d]=16'h1002 ; // pushi 0x0002 mem[12'h18e]=16'he000 ; // out mem[12'h18f]=16'h1000 ; // pushi 0x0000 mem[12'h190]=16'he000 ; // out mem[12'h191]=16'h4198 ; // jmp si2c1_a2 mem[12'h192]=16'h1001 ; //si2c1_a1: pushi 0x0001 mem[12'h193]=16'he000 ; // out mem[12'h194]=16'h1003 ; // pushi 0x0003 mem[12'h195]=16'he000 ; // out mem[12'h196]=16'h1001 ; // pushi 0x0001 mem[12'h197]=16'he000 ; // out mem[12'h198]=16'h21a4 ; //si2c1_a2: push si2c1_val mem[12'h199]=16'h1001 ; // pushi 1 mem[12'h19a]=16'hf003 ; // shl mem[12'h19b]=16'h31a4 ; // pop si2c1_val mem[12'h19c]=16'h21a5 ; // push si2c1_i mem[12'h19d]=16'h1001 ; // pushi 1 mem[12'h19e]=16'hf001 ; // sub mem[12'h19f]=16'h31a5 ; // pop si2c1_i mem[12'h1a0]=16'h21a5 ; // push si2c1_i mem[12'h1a1]=16'h6187 ; // jnz si2c1_a3 mem[12'h1a2]=16'h4000 ; //si2c1_rtn: jmp 0x000 mem[12'h1a3]=16'h4000 ; //si2c1_jmp: 0x4000 mem[12'h1a4]=16'h0000 ; //si2c1_val: 0x0000 mem[12'h1a5]=16'h0000 ; //si2c1_i: 0x0000 mem[12'h1a6]=16'h21f0 ; //ri2c1: PUSH ri2c1_jmp mem[12'h1a7]=16'hf006 ; // BOR mem[12'h1a8]=16'h31e9 ; // POP ri2c1_rtn mem[12'h1a9]=16'h31f1 ; // POP ri2c1_addr mem[12'h1aa]=16'h31f2 ; // pop ri2c1_reg mem[12'h1ab]=16'h31f3 ; // pop ri2c1_raddr mem[12'h1ac]=16'h1271 ; // PUSHI i2cStart mem[12'h1ad]=16'h11af ; // PUSHI ri2c1_a1 mem[12'h1ae]=16'h4251 ; // JMP SubI2C1 mem[12'h1af]=16'h21f1 ; //ri2c1_a1: push ri2c1_addr mem[12'h1b0]=16'h1001 ; // pushi 1 mem[12'h1b1]=16'hf003 ; // shl mem[12'h1b2]=16'h11b4 ; // pushi ri2c1_a2 mem[12'h1b3]=16'h4181 ; // jmp si2c1 mem[12'h1b4]=16'h127e ; //ri2c1_a2: PUSHI i2cRAck mem[12'h1b5]=16'h11b7 ; // PUSHI ri2c1_a3 mem[12'h1b6]=16'h4251 ; // JMP SubI2C1 mem[12'h1b7]=16'hd000 ; //ri2c1_a3: in mem[12'h1b8]=16'h1001 ; // pushi 0x01 mem[12'h1b9]=16'hf005 ; // band mem[12'h1ba]=16'h51bd ; // jz ri2c1_a3_1 mem[12'h1bb]=16'h1001 ; // pushi 1 mem[12'h1bc]=16'h41ea ; // jmp ri2c1_err mem[12'h1bd]=16'h21f2 ; //ri2c1_a3_1: push ri2c1_reg mem[12'h1be]=16'h11c0 ; // pushi ri2c1_a4 mem[12'h1bf]=16'h4181 ; // jmp si2c1 mem[12'h1c0]=16'h127e ; //ri2c1_a4: PUSHI i2cRAck mem[12'h1c1]=16'h11c3 ; // PUSHI ri2c1_a5 mem[12'h1c2]=16'h4251 ; // JMP SubI2C1 mem[12'h1c3]=16'hd000 ; //ri2c1_a5: in mem[12'h1c4]=16'h1001 ; // pushi 0x01 mem[12'h1c5]=16'hf005 ; // band mem[12'h1c6]=16'h51c9 ; // jz ri2c1_a5_1 mem[12'h1c7]=16'h1002 ; // pushi 2 mem[12'h1c8]=16'h41ea ; // jmp ri2c1_err mem[12'h1c9]=16'h1271 ; //ri2c1_a5_1: PUSHI i2cStart mem[12'h1ca]=16'h11cc ; // PUSHI ri2c1_a6 mem[12'h1cb]=16'h4251 ; // JMP SubI2C1 mem[12'h1cc]=16'h21f1 ; //ri2c1_a6: push ri2c1_addr mem[12'h1cd]=16'h1001 ; // pushi 1 mem[12'h1ce]=16'hf003 ; // shl mem[12'h1cf]=16'h1001 ; // pushi 0x0001 mem[12'h1d0]=16'hf006 ; // BOR mem[12'h1d1]=16'h11d3 ; // pushi ri2c1_a7 mem[12'h1d2]=16'h4181 ; // jmp si2c1 mem[12'h1d3]=16'h127e ; //ri2c1_a7: PUSHI i2cRAck mem[12'h1d4]=16'h11d6 ; // PUSHI ri2c1_a8 mem[12'h1d5]=16'h4251 ; // JMP SubI2C1 mem[12'h1d6]=16'hd000 ; //ri2c1_a8: in mem[12'h1d7]=16'h1001 ; // pushi 0x01 mem[12'h1d8]=16'hf005 ; // band mem[12'h1d9]=16'h51dc ; // jz ri2c1_a8_1 mem[12'h1da]=16'h1003 ; // pushi 3 mem[12'h1db]=16'h41ea ; // jmp ri2c1_err mem[12'h1dc]=16'h128e ; //ri2c1_a8_1: pushi i2cRead mem[12'h1dd]=16'h11df ; // pushi ri2c1_a9 mem[12'h1de]=16'h4251 ; // jmp SubI2C1 mem[12'h1df]=16'h21f3 ; //ri2c1_a9: push ri2c1_raddr mem[12'h1e0]=16'hd000 ; // in mem[12'h1e1]=16'h8000 ; // st mem[12'h1e2]=16'h1286 ; // PUSHI i2cNAck mem[12'h1e3]=16'h11e5 ; // PUSHI ri2c1_a10 mem[12'h1e4]=16'h4251 ; // JMP SubI2C1 mem[12'h1e5]=16'h128a ; //ri2c1_a10: PUSHI i2cStop mem[12'h1e6]=16'h11e8 ; // PUSHI ri2c1_a11 mem[12'h1e7]=16'h4251 ; // JMP SubI2C1 mem[12'h1e8]=16'h1000 ; //ri2c1_a11: pushI 0 mem[12'h1e9]=16'h4000 ; //ri2c1_rtn: jmp 0x000 mem[12'h1ea]=16'h31f4 ; //ri2c1_err: pop ri2c1_ercode mem[12'h1eb]=16'h128a ; // PUSHI i2cStop mem[12'h1ec]=16'h11ee ; // PUSHI ri2c1_a12 mem[12'h1ed]=16'h4251 ; // JMP SubI2C1 mem[12'h1ee]=16'h21f4 ; //ri2c1_a12: push ri2c1_ercode mem[12'h1ef]=16'h41e9 ; // jmp ri2c1_rtn mem[12'h1f0]=16'h4000 ; //ri2c1_jmp: 0x4000 mem[12'h1f1]=16'h0000 ; //ri2c1_addr: 0x0000 mem[12'h1f2]=16'h0000 ; //ri2c1_reg: 0x0000 mem[12'h1f3]=16'h0000 ; //ri2c1_raddr: 0x0000 mem[12'h1f4]=16'h0000 ; //ri2c1_ercode: 0x0000 mem[12'h1f5]=16'h224b ; //ri2c2: PUSH ri2c2_jmp mem[12'h1f6]=16'hf006 ; // BOR mem[12'h1f7]=16'h3244 ; // POP ri2c2_rtn mem[12'h1f8]=16'h324c ; // POP ri2c2_addr mem[12'h1f9]=16'h324d ; // pop ri2c2_reg mem[12'h1fa]=16'h324e ; // pop ri2c2_raddr mem[12'h1fb]=16'h1271 ; // PUSHI i2cStart mem[12'h1fc]=16'h11fe ; // PUSHI ri2c2_a1 mem[12'h1fd]=16'h4251 ; // JMP SubI2C1 mem[12'h1fe]=16'h224c ; //ri2c2_a1: push ri2c2_addr mem[12'h1ff]=16'h1001 ; // pushi 1 mem[12'h200]=16'hf003 ; // shl mem[12'h201]=16'h1203 ; // pushi ri2c2_a2 mem[12'h202]=16'h4181 ; // jmp si2c1 mem[12'h203]=16'h127e ; //ri2c2_a2: PUSHI i2cRAck mem[12'h204]=16'h1206 ; // PUSHI ri2c2_a3 mem[12'h205]=16'h4251 ; // JMP SubI2C1 mem[12'h206]=16'hd000 ; //ri2c2_a3: in mem[12'h207]=16'h1001 ; // pushi 0x01 mem[12'h208]=16'hf005 ; // band mem[12'h209]=16'h520c ; // jz ri2c2_a3_1 mem[12'h20a]=16'h1001 ; // pushi 1 mem[12'h20b]=16'h4245 ; // jmp ri2c2_err mem[12'h20c]=16'h224d ; //ri2c2_a3_1: push ri2c2_reg mem[12'h20d]=16'h120f ; // pushi ri2c2_a4 mem[12'h20e]=16'h4181 ; // jmp si2c1 mem[12'h20f]=16'h127e ; //ri2c2_a4: PUSHI i2cRAck mem[12'h210]=16'h1212 ; // PUSHI ri2c2_a5 mem[12'h211]=16'h4251 ; // JMP SubI2C1 mem[12'h212]=16'hd000 ; //ri2c2_a5: in mem[12'h213]=16'h1001 ; // pushi 0x01 mem[12'h214]=16'hf005 ; // band mem[12'h215]=16'h5218 ; // jz ri2c2_a5_1 mem[12'h216]=16'h1002 ; // pushi 2 mem[12'h217]=16'h4245 ; // jmp ri2c2_err mem[12'h218]=16'h1271 ; //ri2c2_a5_1: PUSHI i2cStart mem[12'h219]=16'h121b ; // PUSHI ri2c2_a6 mem[12'h21a]=16'h4251 ; // JMP SubI2C1 mem[12'h21b]=16'h224c ; //ri2c2_a6: push ri2c2_addr mem[12'h21c]=16'h1001 ; // pushi 1 mem[12'h21d]=16'hf003 ; // shl mem[12'h21e]=16'h1001 ; // pushi 0x0001 mem[12'h21f]=16'hf006 ; // BOR mem[12'h220]=16'h1222 ; // pushi ri2c2_a7 mem[12'h221]=16'h4181 ; // jmp si2c1 mem[12'h222]=16'h127e ; //ri2c2_a7: PUSHI i2cRAck mem[12'h223]=16'h1225 ; // PUSHI ri2c2_a8 mem[12'h224]=16'h4251 ; // JMP SubI2C1 mem[12'h225]=16'hd000 ; //ri2c2_a8: in mem[12'h226]=16'h1001 ; // pushi 0x01 mem[12'h227]=16'hf005 ; // band mem[12'h228]=16'h522b ; // jz ri2c2_a8_1 mem[12'h229]=16'h1003 ; // pushi 3 mem[12'h22a]=16'h4245 ; // jmp ri2c2_err mem[12'h22b]=16'h128e ; //ri2c2_a8_1: pushi i2cRead mem[12'h22c]=16'h122e ; // pushi ri2c2_l9 mem[12'h22d]=16'h4251 ; // jmp SubI2C1 mem[12'h22e]=16'hd000 ; //ri2c2_l9: in mem[12'h22f]=16'h1008 ; // pushi 8 mem[12'h230]=16'hf003 ; // shl mem[12'h231]=16'h324f ; // pop ri2c2_val1 mem[12'h232]=16'h1282 ; // PUSHI i2cWAck mem[12'h233]=16'h1235 ; // PUSHI ri2c2_a10 mem[12'h234]=16'h4251 ; // JMP SubI2C1 mem[12'h235]=16'h128e ; //ri2c2_a10: pushi i2cRead mem[12'h236]=16'h1238 ; // pushi ri2c2_a11 mem[12'h237]=16'h4251 ; // jmp SubI2C1 mem[12'h238]=16'h224e ; //ri2c2_a11: push ri2c2_raddr mem[12'h239]=16'hd000 ; // in mem[12'h23a]=16'h224f ; // push ri2c2_val1 mem[12'h23b]=16'hf006 ; // bor mem[12'h23c]=16'h8000 ; // st mem[12'h23d]=16'h1286 ; // PUSHI i2cNAck mem[12'h23e]=16'h1240 ; // PUSHI ri2c2_a12 mem[12'h23f]=16'h4251 ; // JMP SubI2C1 mem[12'h240]=16'h128a ; //ri2c2_a12: PUSHI i2cStop mem[12'h241]=16'h1243 ; // PUSHI ri2c2_a13 mem[12'h242]=16'h4251 ; // JMP SubI2C1 mem[12'h243]=16'h1000 ; //ri2c2_a13: pushI 0 mem[12'h244]=16'h4000 ; //ri2c2_rtn: jmp 0x000 mem[12'h245]=16'h3250 ; //ri2c2_err: pop ri2c2_ercode mem[12'h246]=16'h128a ; // PUSHI i2cStop mem[12'h247]=16'h1249 ; // PUSHI ri2c2_a14 mem[12'h248]=16'h4251 ; // JMP SubI2C1 mem[12'h249]=16'h2250 ; //ri2c2_a14: push ri2c2_ercode mem[12'h24a]=16'h4244 ; // jmp ri2c2_rtn mem[12'h24b]=16'h4000 ; //ri2c2_jmp: 0x4000 mem[12'h24c]=16'h0000 ; //ri2c2_addr: 0x0000 mem[12'h24d]=16'h0000 ; //ri2c2_reg: 0x0000 mem[12'h24e]=16'h0000 ; //ri2c2_raddr: 0x0000 mem[12'h24f]=16'h0000 ; //ri2c2_val1: 0x0000 mem[12'h250]=16'h0000 ; //ri2c2_ercode: 0x0000 mem[12'h251]=16'h226c ; //SubI2C1: PUSH LblJMP mem[12'h252]=16'hf006 ; // BOR mem[12'h253]=16'h326b ; // POP RtnSub1 mem[12'h254]=16'h326d ; // POP Sub1Data2 mem[12'h255]=16'h226d ; // PUSH Sub1Data2 mem[12'h256]=16'h7000 ; // LD mem[12'h257]=16'h3270 ; // POP N mem[12'h258]=16'h226d ; // PUSH Sub1Data2 mem[12'h259]=16'h1001 ; // PUSHI 1 mem[12'h25a]=16'hf000 ; // ADD mem[12'h25b]=16'h326e ; // POP Sub1SA mem[12'h25c]=16'h1000 ; // PUSHI 0 mem[12'h25d]=16'h326f ; // POP i mem[12'h25e]=16'h226f ; //L1: PUSH i mem[12'h25f]=16'h226e ; // PUSH Sub1SA mem[12'h260]=16'hf000 ; // ADD mem[12'h261]=16'h7000 ; // LD mem[12'h262]=16'he000 ; // OUT mem[12'h263]=16'h226f ; // PUSH i mem[12'h264]=16'h1001 ; // PUSHI 1 mem[12'h265]=16'hf000 ; // ADD mem[12'h266]=16'h326f ; // POP i mem[12'h267]=16'h226f ; // PUSH i mem[12'h268]=16'h2270 ; // PUSH N mem[12'h269]=16'hf001 ; // SUB mem[12'h26a]=16'h625e ; // JNZ L1 mem[12'h26b]=16'h4000 ; //RtnSub1: JMP 0x000 mem[12'h26c]=16'h4000 ; //LblJMP: 0x4000 mem[12'h26d]=16'h0000 ; //Sub1Data2: 0x0000 mem[12'h26e]=16'h0000 ; //Sub1SA: 0x0000 mem[12'h26f]=16'h0000 ; //i: 0x0000 mem[12'h270]=16'h0000 ; //N: 0x0000 mem[12'h271]=16'h0003 ; //i2cStart: 3 mem[12'h272]=16'h0001 ; // 1 mem[12'h273]=16'h0003 ; // 3 mem[12'h274]=16'h0002 ; // 2 mem[12'h275]=16'h0000 ; // 0 mem[12'h276]=16'h0003 ; //i2cAddrW: 3 mem[12'h277]=16'h0000 ; // 0 mem[12'h278]=16'h0002 ; // 2 mem[12'h279]=16'h0000 ; // 0 mem[12'h27a]=16'h0003 ; //i2cAddrR: 3 mem[12'h27b]=16'h0001 ; // 1 mem[12'h27c]=16'h0003 ; // 3 mem[12'h27d]=16'h0001 ; // 1 mem[12'h27e]=16'h0003 ; //i2cRAck: 3 mem[12'h27f]=16'h0001 ; // 1 mem[12'h280]=16'h0003 ; // 3 mem[12'h281]=16'h0001 ; // 1 mem[12'h282]=16'h0003 ; //i2cWAck: 3 mem[12'h283]=16'h0000 ; // 0 mem[12'h284]=16'h0002 ; // 2 mem[12'h285]=16'h0000 ; // 0 mem[12'h286]=16'h0003 ; //i2cNAck: 3 mem[12'h287]=16'h0001 ; // 1 mem[12'h288]=16'h0003 ; // 3 mem[12'h289]=16'h0001 ; // 1 mem[12'h28a]=16'h0003 ; //i2cStop: 3 mem[12'h28b]=16'h0002 ; // 2 mem[12'h28c]=16'h0003 ; // 3 mem[12'h28d]=16'h0003 ; // 3 mem[12'h28e]=16'h0011 ; //i2cRead: 0x0011 mem[12'h28f]=16'h0001 ; // 1 mem[12'h290]=16'h0003 ; // 3 mem[12'h291]=16'h0001 ; // 1 mem[12'h292]=16'h0003 ; // 3 mem[12'h293]=16'h0001 ; // 1 mem[12'h294]=16'h0003 ; // 3 mem[12'h295]=16'h0001 ; // 1 mem[12'h296]=16'h0003 ; // 3 mem[12'h297]=16'h0001 ; // 1 mem[12'h298]=16'h0003 ; // 3 mem[12'h299]=16'h0001 ; // 1 mem[12'h29a]=16'h0003 ; // 3 mem[12'h29b]=16'h0001 ; // 1 mem[12'h29c]=16'h0003 ; // 3 mem[12'h29d]=16'h0001 ; // 1 mem[12'h29e]=16'h0003 ; // 3 mem[12'h29f]=16'h0001 ; // 1 end endmodule